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FIN ISOLATION FOR MULTIGATE TRANSISTORS

  • US 20130316513A1
  • Filed: 05/23/2012
  • Published: 11/28/2013
  • Est. Priority Date: 05/23/2012
  • Status: Abandoned Application
First Claim
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1. A method for fabricating a multigate transistor device comprising:

  • providing a substrate including a semiconductor upper layer and a lower layer beneath the upper layer, wherein the lower layer has a rate of transformation into a dielectric that is higher than a rate of transformation into a dielectric of the upper layer when the upper and lower layers are subjected to dielectric transformation conditions;

    forming fins in the upper layer;

    transforming, after said forming, the lower layer beneath the fins into a dielectric material by germanium condensation of at least a portion of the lower layer to electrically isolate the fins; and

    forming a gate structure over the fins to complete the multigate transistor device.

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