SEMICONDUCTOR DEVICE

• US 20130320337A1
• Filed: 05/30/2013
• Published: 12/05/2013
• Est. Priority Date: 05/31/2012
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: YAMAZAKI, Shunpei, OKAZAKI, Kenichi, WATANABE, Masahiro, HANDA, Takuya
• Granted Patent: US 8,785,928 B2
• Time in Patent Office: Days
• US Class Current: 257/43
• CPC Class Codes: G09G 2300/0439 Pixel structures
• CPC Class Codes: G09G 2310/08 Details of timing specific for flat panels, other than clock recovery
• CPC Class Codes: G09G 3/3225 using an active matrix
• CPC Class Codes: G09G 3/3648 using an active matrix G09G3/367 - G09G3/3696 take precedence
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
• CPC Class Codes: H01L 27/124 with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits wiring structures per se H01L23/52

Abstract

A highly reliable semiconductor device that includes a transistor including an oxide semiconductor, which can display a high-definition image and can be manufactured with a high yield. The semiconductor device includes a pixel portion including a plurality of pixels, a gate signal line driver circuit portion, and a source signal line driver circuit portion including a first circuit that controls timing of sampling video signals and a second circuit that samples the video signals in accordance with the timing and then inputs the sampled video signals to the pixels. The second circuit includes a plurality of transistors in each of which an oxide semiconductor stacked layer is used as a channel formation region, the first circuit and the second circuit are electrically connected to each other by a wiring, and the wiring is electrically connected to gates of at least two transistors of the plurality of transistors.

Claims

1. A semiconductor device comprising:

a pixel portion including a plurality of pixels; and

a source signal line driver circuit portion including a first circuit and a second circuit,

wherein the first circuit is configured to control timing for sampling video signals,

wherein the second circuit is configured to sample the video signals in accordance with the timing and is configured to input sampled video signals to the plurality of pixels,

wherein the second circuit includes a first transistor and a second transistor, the first transistor comprising a first oxide semiconductor film and a second oxide semiconductor film which are stacked with each other,

wherein the first oxide semiconductor film comprises indium and a Group 13 element other than the indium and has a composition where an atomic percent of the indium is greater than an atomic percent of the Group 13 element other than the indium,

wherein the second oxide semiconductor film comprises indium and a Group 13 element other than the indium and has a composition where an atomic percent of the indium is less than or equal to an atomic percent of the Group 13 element other than the indium,

wherein the first circuit and the second circuit are electrically connected to each other by a wiring, and

wherein the wiring is electrically connected to a gate of the first transistor and a gate of the second transistor.

2. The semiconductor device according to claim 1, wherein the first circuit includes a semiconductor element using a single crystal semiconductor substrate.

3. The semiconductor device according to claim 1, wherein the first transistor and the second transistor each has a field effect mobility of 20 cm²/Vs or higher.

4. The semiconductor device according to claim 1, wherein the first oxide semiconductor film has a composition where an atomic percent of the indium is greater than twice of an atomic percent of the Group 13 element other than the indium.

5. The semiconductor device according to claim 1, wherein the Group 13 element other than the indium is gallium.

6. The semiconductor device according to claim 5, wherein the first oxide semiconductor film comprises zinc and has a composition where the atomic ratio of indium, gallium, and zinc is substantially 3:

1;

2.

7. The semiconductor device according to claim 5, wherein the second oxide semiconductor film comprises zinc and has a composition where the atomic ratio of indium, gallium, and zinc is substantially 1:

1;

1.

8. The semiconductor device according to claim 1, wherein the first transistor and the second transistor each comprises silicon and nitrogen as a gate insulating film.

9. The semiconductor device according to claim 1, wherein the first oxide semiconductor film or the second oxide semiconductor film comprises a c-axis aligned crystalline oxide semiconductor.

10. The semiconductor device according to claim 1, wherein the first oxide semiconductor film or the second oxide semiconductor film comprises an amorphous oxide semiconductor.

11. The semiconductor device according to claim 1,

wherein the first transistor further comprises a third oxide semiconductor film,

wherein the first oxide semiconductor film is interposed between the second oxide semiconductor film and the third oxide semiconductor film, and

wherein the third oxide semiconductor film comprises indium and a Group 13 element other than the indium and has a composition where an atomic percent of the indium is less than or equal to an atomic percent of the Group 13 element other than the indium.

12. The semiconductor device according to claim 11, wherein the third oxide semiconductor film comprises a c-axis aligned crystalline oxide semiconductor.

13. The semiconductor device according to claim 11, wherein the third oxide semiconductor film comprises an amorphous oxide semiconductor.

14. The semiconductor device according to claim 11,

wherein the Group 13 element other than the indium is gallium, and

wherein the first oxide semiconductor film comprises zinc and has a composition where the atomic ratio of indium, gallium, and zinc is substantially 3:

1;

2.

15. The semiconductor device according to claim 11,

wherein the Group 13 element other than the indium is gallium, and

wherein the second oxide semiconductor film comprises zinc and has a composition where the atomic ratio of indium, gallium, and zinc is substantially 1:

3;

2.

16. The semiconductor device according to claim 11,

wherein the Group 13 element other than the indium is gallium, and

wherein the third oxide semiconductor film comprises zinc and has a composition where the atomic ratio of indium, gallium, and zinc is substantially 1:

1;

1.