MULTI-LEVEL CELL (MLC) UPDATE WITH PROTECTED MODE CAPABILITY
First Claim
1. A method comprising:
- writing a first block of data to a group of memory cells at a first memory location in single-level cell (SLC) mode;
copying the first block of data to a group of memory cells at a second memory location to provide a backup copy of the first block of data responsive to initiation of a protected mode of operation; and
overwriting a second block of data to the group of memory cells at the first memory location so that the first memory location stores both the first and second blocks of data in multi-level cell (MLC) mode.
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Abstract
Method and apparatus for managing data in a memory, such as a flash memory array. In accordance with some embodiments, a first block of data is written to a group of memory cells at a first memory location in single-level cell (SLC) mode. The first block of data is copied from the first memory location to a group of memory cells at a second memory location to provide a backup copy of the first block of data during a protected mode of operation. A second block of data is subsequently overwritten to the group of memory cells at the first memory location so that the first memory location stores both the first and second blocks of data in multi-level cell (MLC) mode.
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Citations
20 Claims
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1. A method comprising:
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writing a first block of data to a group of memory cells at a first memory location in single-level cell (SLC) mode; copying the first block of data to a group of memory cells at a second memory location to provide a backup copy of the first block of data responsive to initiation of a protected mode of operation; and overwriting a second block of data to the group of memory cells at the first memory location so that the first memory location stores both the first and second blocks of data in multi-level cell (MLC) mode. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 17)
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- 11. An apparatus comprising a non-volatile memory array formed of memory cells, and a control circuit adapted to write a first block of data to a group of memory cells at a first memory location in the array in single-level cell (SLC) mode, and responsive to receipt of a second block of data for storage to the array and an initiated protected mode of operation, to copy the first block of data to a group of memory cells at a second memory location in the array to provide a backup copy of the first block of data, and to overwrite a second block of data to the group of memory cells at the first memory location in multi-level cell (MLC) mode so that each memory cell at the first memory location stores at least one bit from each of the first and second blocks of data.
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18. An apparatus comprising:
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a memory module comprising an array of solid-state memory cells each having an associated address; a multi-level cell (MLC) update manager which initiates a protected mode of operation; and a control module which operates during said protected mode of operation to write a first block of data to the memory cells at a first memory location in the array in single-level cell (SLC) mode, to copy the first block of data from the first memory location to the memory cells at a second memory location in the array, and to overwrite the memory cells at the first memory location with the second block of data so that the first memory location stores both the first and second blocks of data in MLC mode with each memory cell in the first memory location storing at least one bit from each of the first and second blocks of data. - View Dependent Claims (19, 20)
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Specification