Security Within Integrated Circuits

• US 20130326632A1
• Filed: 08/05/2013
• Published: 12/05/2013
• Est. Priority Date: 06/24/2008
• Status: Active Grant

• Current Assignee: Cisco Technology, Inc. (Cisco Systems, Inc.)
• Original Assignee: Cisco Technology, Inc. (Cisco Systems, Inc.)
• Inventors: Shen-Orr, Chaim, Shkedy, Zvi, Elbaum, Reuven, Shlomovich, Yonatan, Shapiro, Yigal, Belenky, Yaacov, Levy, Yaakov (Jordan), Sumner, Reuben, Mantin, Itsik
• Granted Patent: US 8,913,745 B2
• Time in Patent Office: Days
• US Class Current: 726/26
• CPC Class Codes: G06F 21/60 Protecting data
• CPC Class Codes: G06F 21/79 in semiconductor storage media, e.g. directly-addressable memories
• CPC Class Codes: H04L 9/003 for power analysis, e.g. differential power analysis [DPA] or simple power analysis [SPA]

Abstract

A method for hindering detection of information unintentionally leaked from a secret held in a memory unit is described, the method including receiving a triggering event waiting for at least a first amount of time to pass after the receipt of the triggering event, the memory unit being in a non-operational state during the at least a first amount of time after the at least a first amount of time has passed, changing at least one first condition under which the memory unit operates, thereby causing the memory unit to enter an operational state, waiting for a second amount of time to pass after the changing at least one first condition, and changing, after the second amount of time, at least one second condition under which the memory unit operates, thereby causing the memory unit to enter the non-operational state, wherein access to the secret information is enabled only during the second amount of time, and detection of secret information unintentionally leaked is limited during the first amount of time. Related apparatus and methods are also described.

Claims

1-24. -24. (canceled)

25. A method for hindering detection of secret information unintentionally leaked from a secret held in a memory unit, the method comprising:

storing the secret information in a location within the memory unit;

episodically re-deriving the secret information; and

storing the re-derived secret information at the location within the memory unit,

wherein the episodic re-deriving of the secret information causes an episodic change of physical contents of the memory unit holding the secret information, thereby causing the secret information unintentionally leaked from the memory unit to vary over time causing any detector of leaked information requiring long collection times to receive an average of the leaked information, the average of the leaked information not revealing the leaked information.

26. The method according to claim 25 and wherein the memory unit comprises one of:

a register; and

random access memory.

27. The method according to either of claim 25 wherein the re-deriving the secret information comprises a XOR-ing the secret information with one of a random number;

and a pseudo-random number.

28. The method according to claim 25 and wherein the episodically re-deriving the secret information is performed at time intervals dependent on a timing mechanism which is tamper resistant.

29. The method according to claim 28 and wherein the time intervals are random time intervals.

32. The method according to claim 25 and wherein the secret information comprised in the memory unit is comprised in the memory unit in an obfuscated form.

33. The method according to claim 32 and wherein the obfuscation comprises cryptographic obfuscation.

34. The method according to claim 25 and further comprising:

outputting the secret information to a second memory unit;

storing the secret information in a location within the second memory unit;

episodically re-deriving the secret information; and

storing the re-derived secret information at the location,

wherein the episodic re-deriving of the secret information causes an episodic change of physical contents of the second memory unit holding the secret information, thereby causing the secret information unintentionally leaked from the memory unit to vary over time causing any detector of leaked information requiring long collection times to receive an average of the leaked information, the average of the leaked information not revealing the leaked information.

35. The method according to claim 34 and wherein the second memory unit comprises one of:

a register; and

RAM.

36. The method according to claim 34 wherein the re-deriving the secret information comprises a XOR-ing the secret information with a pseudo-random number.

37. The method according to claim 34 wherein the re-deriving the secret information comprises holding the secret information in a shift register which is changed each time the register is clocked.

38. The method according to claim 25 wherein the episodically re-deriving the secret information comprising episodically changing each bit of the secret information.

30. (canceled)

31. A system for hindering detection of secret information unintentionally leaked from a secret held in a memory unit, the system comprising:

a secret information store which stores the secret information in a location within the memory unit;

an episodic secret information re-deriver; and

the secret information store being operative to store the re-derived secret information at the location within the memory unit,

wherein the episodic re-deriving of the secret information causes an episodic change of physical contents of the memory unit holding the secret information, thereby causing the secret information unintentionally leaked from the memory unit to vary over time causing any detector of leaked information requiring long collection times to receive an average of the leaked information, the average of the leaked information not revealing the leaked information.