MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE

• US 20130328044A1
• Filed: 08/13/2013
• Published: 12/12/2013
• Est. Priority Date: 07/03/2009
• Status: Abandoned Application

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: YAMAZAKI, Shunpei, SASAKI, Toshinari, SAKATA, Junichiro, OHARA, Hiroki
• Application Number:
  US13/965,309
• Publication Number:
  US 20130328044A1
• Time in Patent Office: Days
• US Class Current: 257/43
• CPC Class Codes: H01L 21/67109 mainly by convection
• CPC Class Codes: H01L 21/67115 mainly by radiation
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate

Abstract

An object is to provide a highly reliable semiconductor device including a thin film transistor with stable electric characteristics. In a method for manufacturing a semiconductor device including a thin film transistor in which an oxide semiconductor film is used for a semiconductor layer including a channel formation region, impurities such as moisture existing in the gate insulating layer are reduced before formation of the oxide semiconductor film, and then heat treatment (heat treatment for dehydration or dehydrogenation) is performed so as to improve the purity of the oxide semiconductor film and reduce impurities such as moisture. After that, slow cooling is performed in an oxygen atmosphere. Besides impurities such as moisture existing in the gate insulating layer and the oxide semiconductor film, impurities such as moisture existing at interfaces between the oxide semiconductor film and upper and lower films provided in contact therewith are reduced.

Claims

1. (canceled)

2. A semiconductor device comprising:

a substrate;

a first gate electrode layer on the substrate;

an oxide semiconductor layer over and overlapping the first gate electrode layer;

a first insulating layer interposed between the oxide semiconductor layer and the first gate electrode layer;

a second gate electrode layer over and overlapping the oxide semiconductor layer and the first gate electrode layer;

a second insulating layer interposed between the oxide semiconductor layer and the second gate electrode layer; and

a source electrode layer and a drain electrode layer each in contact with the oxide semiconductor layer.

6. The semiconductor device according to claim 2,

wherein the second gate electrode layer is formed from a transparent conductive film.

9. The semiconductor device according to claim 2,

wherein the second gate electrode layer is formed from a transparent conductive oxide film.

12. The semiconductor device according to claim 2,

wherein the first gate electrode layer and the second gate electrode layer are configured to be put a same potential.

15. The semiconductor device according to claim 2,

wherein a top surface and a bottom surface of the oxide semiconductor layer are respectively in direct contact with a first oxide insulating layer and a second oxide insulating layer.

18. The semiconductor device according to claim 2,

wherein an average value or a peak value of hydrogen concentration in the oxide semiconductor layer is 3×

10²⁰ cm<sup>−

3</sup> or less.

21. An electronic appliance including the semiconductor device according to claim 2.

3. A semiconductor device comprising:

a substrate;

a first gate electrode layer on the substrate;

an oxide semiconductor layer over and overlapping the first gate electrode layer;

a first insulating layer interposed between the oxide semiconductor layer and the first gate electrode layer;

a second gate electrode layer over and overlapping the oxide semiconductor layer and the first gate electrode layer;

a second insulating layer interposed between the oxide semiconductor layer and the second gate electrode layer;

a planarization film between the second insulating layer and the second gate electrode layer; and

a source electrode layer and a drain electrode layer each in contact with the oxide semiconductor layer.

7. The semiconductor device according to claim 3,

wherein the second gate electrode layer is formed from a transparent conductive film.

10. The semiconductor device according to claim 3,

wherein the second gate electrode layer is formed from a transparent conductive oxide film.

13. The semiconductor device according to claim 3,

wherein the first gate electrode layer and the second gate electrode layer are configured to be put a same potential.

16. The semiconductor device according to claim 3,

wherein a top surface and a bottom surface of the oxide semiconductor layer are respectively in direct contact with a first oxide insulating layer and a second oxide insulating layer.

19. The semiconductor device according to claims 3,

wherein an average value or a peak value of hydrogen concentration in the oxide semiconductor layer is 3×

10²⁰ cm<sup>−

3</sup> or less.

22. An electronic appliance including the semiconductor device according to claim 3.

4. A semiconductor device comprising:

a substrate;

a first gate electrode layer on the substrate;

an oxide semiconductor layer over and overlapping the first gate electrode layer;

a first insulating layer interposed between the oxide semiconductor layer and the first gate electrode layer;

a second gate electrode layer over and overlapping the oxide semiconductor layer and the first gate electrode layer;

a second insulating layer interposed between the oxide semiconductor layer and the second gate electrode layer;

a source electrode layer and a drain electrode layer each in contact with the oxide semiconductor layer; and

a pixel electrode electrically connected to one of the source electrode layer and the drain electrode layer,

wherein the second gate electrode layer and the pixel electrode are made from a same material.

5. The semiconductor device according to claim 4 further comprising:

a planarization film between the second insulating layer and the second gate electrode layer.

8. The semiconductor device according to claim 4,

wherein the second gate electrode layer and the pixel electrode are formed from a transparent conductive film.

11. The semiconductor device according to claim 4,

wherein the second gate electrode layer and the pixel electrode are formed from a transparent conductive oxide film.

14. The semiconductor device according to claim 4,

wherein the first gate electrode layer and the second gate electrode layer are configured to be put a same potential.

17. The semiconductor device according to claim 4,

wherein a top surface and a bottom surface of the oxide semiconductor layer are respectively in direct contact with a first oxide insulating layer and a second oxide insulating layer.

20. The semiconductor device according to claim 4,

wherein an average value or a peak value of hydrogen concentration in the oxide semiconductor layer is 3×

10²⁰ cm<sup>−

3</sup> or less.

23. An electronic appliance including the semiconductor device according to claim 4.