METHODS AND APPARATUSES FOR IMPLEMENTING VARIABLE BANDWIDTH RF TRACKING FILTERS FOR RECONFIGURABLE MULTI-STANDARD RADIOS

• US 20130335163A1
• Filed: 03/28/2013
• Published: 12/19/2013
• Est. Priority Date: 06/13/2012
• Status: Active Grant

• Current Assignee: Nokia Technologies Oy (Nokia Corporation)
• Original Assignee: Nokia Corporation
• Inventors: AGGARWAL, Sudhir, Xiao, Xiao
• Granted Patent: US 9,136,815 B2
• Time in Patent Office: Days
• US Class Current: 333/132
• CPC Class Codes: H03H 19/002 N-path filters
• CPC Class Codes: H03H 7/12 Bandpass or bandstop filters with adjustable bandwidth and fixed centre frequency H03H7/09 takes precedence; automatic control of bandwidth in amplifiers H03G5/16

Abstract

A variable bandwidth filter comprises a first filter branch in parallel with a second filter branch. The first filter branch comprises a first resistance in series with an input and a first output, and N parallel paths across the first output, each path comprising a corresponding capacitor in series with a corresponding switch and a common terminal. The second filter branch comprises a second resistance in series with the input and a second output, and N parallel paths across the second output, each path comprising an RC network in series with a switch and a common terminal. A clock tunes the first and second filter branches to a center frequency by controlling the switches of the first and second filter branches. A combiner produces a difference signal comprising a difference between the output of the first filter branch and the output of the second filter branch to provide a filter output having an adjustable bandwidth with reference to a center frequency. The bandwidth is adjusted by changing a value of at least one resistor or at least one capacitor in one or more of the first filter branch or the second filter branch.

Claims

1. A variable-bandwidth filter comprising:

a first filter branch in parallel with a second filter branch;

the first filter branch comprising a first resistance in series with an input and a first output, and a first plurality of N parallel paths across the first output, each of respective paths of the first plurality of N parallel paths comprising a corresponding capacitor in series with a corresponding switch and a common terminal;

the second filter branch comprising a second resistance in series with the input and a second output, and a second plurality of N parallel paths across the second output, each of respective paths of the second plurality of N parallel paths comprising a corresponding resistor-capacitor (RC) network in series with a corresponding switch and a common terminal;

a clock for tuning the first and second filter branches to a center frequency by controlling the switches of the first and second filter branches to switch at the center frequency;

a combiner for producing a difference signal comprising a difference between the output of the first filter branch and the output of the second filter branch;

the difference signal providing a filter output for the variable bandwidth filter wherein the filter bandwidth is adjustable with reference to a center frequency, the filter bandwidth being adjustable by changing a value of at least one resistor or at least one capacitor in one or more of the first filter branch or the second filter branch.

2. The variable-bandwidth filter according to claim 1, in which the clock signals that selectively control all the switches of the N paths in the first filter branch have the same frequency and the same first on-time duration and a different phase with reference to the clock signals that selectively control all the switches of the N paths in the second filter branch.

3. The variable-bandwidth filter according to claim 1, in which the clock signals have a first on-time duration for the first filter branch that is different from a second on-time duration for the second filter branch, and the clock signals that control the switches of the N paths in the first filter branch and the clock signals that control the switches of the N paths in the second filter branch all have the same frequency but have a plurality of different phases such that each switch in the first filter branch is paired with one of the switches in the second filter branch according to clock signals having a common phase.

4. The variable-bandwidth filter according to claim 3, further comprising a splitter for applying a same input signal to the input of the first filter branch and the input of the second filter branch.

5. The variable-bandwidth filter according to claim 2, in which N=4 and there are a total of four different phases of the clock signal selectively controlling the switches in the first filter branch and the switches in the second filter branch.

6. The variable-bandwidth filter according to claim 1, in which a first sub-circuit is provided in each of the N parallel paths of the first filter branch, and a second sub-circuit is provided in each of the N parallel paths of the second filter branch, and the first sub-circuit is identical to the second sub-circuit.

7. The variable-bandwidth filter according to claim 1, in which a first sub-circuit is provided in each of the N parallel paths of the first filter branch, and a second sub-circuit is provided in each of the N parallel paths of the second filter branch, and the first sub-circuit is different from the second sub-circuit.

8. The variable-bandwidth filter according to claim 7, in which the first and second on-time durations are identical.

9. The variable-bandwidth filter according to claim 7, in which the first and second on-time durations are different.

10. The variable-bandwidth filter according to claim 1, in which the filter is operatively disposed in an electronic radio device between an antenna and one or both of a receiver and a transmitter.

11. The variable-bandwidth filter according to claim 1, in which the circuit is embodied in a RF front end chip.

12. A method comprising:

providing a variable-bandwidth filter comprising a first filter branch in parallel with a second filter branch;

the first filter branch comprising a first resistance in series with an input and a first output, and a first plurality of N parallel paths across the first output, each of respective paths of the first plurality of N parallel paths comprising a corresponding capacitor in series with a corresponding switch and a common terminal; and

the second filter branch comprising a second resistance in series with the input and a second output, and a second plurality of N parallel paths across the second output, each of respective paths of the second plurality of N parallel paths comprising a corresponding resistor-capacitor (RC) network in series with a corresponding switch and a common terminal;

adjusting the variable-bandwidth filter by using a clock to tune the first and second filter branches to a center frequency by controlling the switches of the first and second filter branches to switch at the center frequency;

producing a difference signal comprising a difference between the output of the first filter branch and the output of the second filter branch;

the difference signal providing a filter output for the variable-bandwidth filter having an adjustable filter bandwidth with reference to a center frequency; and

adjusting the filter bandwidth by changing a value of at least one resistor or at least one capacitor in one or more of the first filter branch or the second filter branch.

13. The method according o claim 12, in which controlling the switches in the first and second filter branches comprises selectively controlling all the switches of the N paths in the first filter branch by applying clock signals to the first filter branch having the same frequency and the same first on-duration and a different phase with reference to clock signals that are applied to the second filter branch.

14. The method according to claim 12 further comprising:

applying first clock signals having a first on-time duration to the first filter branch and applying second clock signals having a second on-time duration to the second filter branch, wherein the first on-time duration is different from the second on-time duration;

wherein the first and second clock signals each comprise signals having the same frequency but a plurality of different phases such that each of respective switches in the first filter branch is paired with a corresponding switch of the switches in the second filter branch according to clock signals having a common phase.

15. The method according to claim 14, in which N=4 and there are a total of four different phases of the clock signal selectively controlling the switches in the first filter branch and the switches in the second filter branch.

16. The method according to claim 12, in which each parallel path of the first filter branch comprises a first sub-circuit and each parallel path of the second filter branch comprises a second sub-circuit and the first sub-circuit is substantially identical to the second sub-circuit.

17. The method according to claim 12, in which each parallel path of the first filter branch comprises a first sub-circuit and each parallel path of the second filter branch comprises a second sub-circuit and the first sub-circuit is different from the second sub-circuit.

18. The method according to claim 12, further comprising applying clock signals to the first filter branch and the second filter branch wherein the first and second on-time durations of the applied clock signals are identical.

19. The method according to claim 12, further comprising applying clock signals to the first filter branch and the second filter branch wherein the first and second on-time durations of the applied clock signals are different.

20. The method according to claim 12, in which the circuit is operatively disposed in an electronic radio dev ice between an antenna and one of a receiver and a transmitter.