REDUCING STORE OPERATION BUSY TIMES
First Claim
1. A computer program product for reducing store operation busy times, the computer program product comprising:
- a tangible storage medium readable by a processing circuit and storing instructions for execution by the processing circuit for performing a method comprising;
associating first and second platform registers with a cache array;
determining, by a comparator, that a first store operation targets a wordline of the cache array;
determining, by the comparator, that a second store operation targets the same wordline of the cache array;
loading control information and data of the first and second store operation into the first and second platform registers;
delaying, by a buffer, a commit of the first store operation until the control information and data of the second store operation is loaded into the second platform register; and
committing the data from the first and second platform registers using the control information from the first and second platform registers to the wordline of the cache array at a same time to thereby reduce a busy time of the wordline of the cache array.
1 Assignment
0 Petitions
Accused Products
Abstract
A computer product for reducing store operation busy times is provided and relates to associating first and second platform registers with a cache array, determining that first and second store operations target a same wordline of the cache array, loading control information and data of the store operations into the platform registers and delaying a commit of the first store operation until the loading of the second platform register is complete. The method further includes committing the data from the platform registers using the control information from the platform registers to the wordline of the cache array at a same time to thereby reduce a busy time of the wordline of the cache array.
3 Citations
20 Claims
-
1. A computer program product for reducing store operation busy times, the computer program product comprising:
-
a tangible storage medium readable by a processing circuit and storing instructions for execution by the processing circuit for performing a method comprising; associating first and second platform registers with a cache array; determining, by a comparator, that a first store operation targets a wordline of the cache array; determining, by the comparator, that a second store operation targets the same wordline of the cache array; loading control information and data of the first and second store operation into the first and second platform registers; delaying, by a buffer, a commit of the first store operation until the control information and data of the second store operation is loaded into the second platform register; and committing the data from the first and second platform registers using the control information from the first and second platform registers to the wordline of the cache array at a same time to thereby reduce a busy time of the wordline of the cache array. - View Dependent Claims (2, 3, 4, 5, 6)
-
-
7. A system for reducing penalties for reducing store operation busy times, the system comprising:
-
a cache array, first and second platform registers associated with the cache array, a comparator and a buffer, the system configured to perform a method comprising; determining, by the comparator, that a first store operation targets a wordline of the cache array; determining, by the comparator, that a second store operation targets the same wordline of the cache array; loading control information and data of the first and second store operation into the first and second platform registers; delaying, by the buffer, a commit of the first store operation until the control information and data of the second store operation is loaded into the second platform register; and committing the data from the first and second platform registers using the control information from the first and second platform registers to the wordline of the cache array at a same time to thereby reduce a busy time of the wordline of the cache array. - View Dependent Claims (8, 9, 10, 11, 12, 13, 14)
-
-
15. (canceled)
-
16. (canceled)
-
17. (canceled)
-
18. (canceled)
-
19. (canceled)
-
20. (canceled)
Specification