Compare and Replace DAT Table Entry

• US 20130339656A1
• Filed: 06/15/2012
• Published: 12/19/2013
• Est. Priority Date: 06/15/2012
• Status: Abandoned Application

• Current Assignee: International Business Machines Corporation
• Original Assignee: International Business Machines Corporation
• Inventors: Greiner, Dan F., Rogers, Robert R., Sittmann, Gustav E. III
• Application Number:
  US13/524,468
• Publication Number:
  US 20130339656A1
• Time in Patent Office: Days
• US Class Current: 711/207
• CPC Class Codes: G06F 12/1009 using page tables, e.g. page table structures
• CPC Class Codes: G06F 12/1027 using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB]
• CPC Class Codes: G06F 2212/683 Invalidation
• CPC Class Codes: G06F 9/30047 Prefetch instructions; cache control instructions
• CPC Class Codes: G06F 9/3824 Operand accessing

Abstract

A first and a second operand are compared. If they are equal, the contents of register R₁+1 are stored at the second-operand location, and the specified CPU or CPUs in the configuration are cleared of all TLB table entries of the designated type formed through the use of the replaced entry in storage, and all lower-level TLB table entries formed through the use of the cleared higher-level TLB table entries. A valid DAT table entry is replaced with a new entry, and the Translation Lookaside Buffer (TLB) is purged of any copies of (at least) the single entry on all CPUs in the configuration. If the first and second operands are unequal, the second operand is loaded at the first-operand location. The comparison result is indicated by the condition code. A method, system and a computer program product are provided.

Claims

1. A computer program product for managing a dynamic address translation (DAT) table, the computer program product comprising:

computer readable storage medium having program code embodied therewith, the program code readable by a computer processor to perform a method comprising;

determining, by the processor, from an opcode of a machine executable instruction to be executed, that the instruction is a compare and replace DAT table entry instruction, the instruction

comprising an R₁ field and an R₂ field; and

executing, by the processor, the instruction, the executing comprising;

based on a type field, adding an index value of an odd register to a value of an even register to form an address of a second operand, the odd register and even register being an even-odd register pair designated by the R₂ field of the instruction;

obtaining an original second operand from a memory location specified by the formed address;

comparing a first operand and the obtained original second operand, the first operand contained in an even-numbered (even R₁) register of an even-odd register pair designated by the R₁ field of the instruction;

based on the first operand being equal to the original second operand, storing the contents of the even R₁ register in the second operand location as the new second operand.

2. The computer program product of claim 1, further comprising selectively clearing all local Translation Lookaside Buffer (TLB) entries corresponding to entries formed from DAT using translation table entries based on a translation table entry designated by a value of the original second operand.

3. The computer program product of claim 1, comprising storing the original second operand into the even R₁ register based on the first operand being not equal to the original second operand.

4. The computer program product of claim 2, wherein a translation table entry selectively cleared corresponds to lower level translation table entries associated with the original second operand.

5. The computer program product according to claim 1, further comprising:

based on a first operand compare value being equal to the second operand, setting a first condition code value; and

based on a first operand compare value being not-equal to the second operand, setting a second condition code value.

6. The computer program product of claim 2 wherein the TLB entries cleared are limited to entries formed to translate addresses in an address space specified by the instruction.

7. The computer program product of claim 2, further comprising:

based on a mask field of the instruction having a first value, selectively clearing only a TLB of the processor executing the instruction of a plurality of processors of a configuration; and

based on a mask field of the instruction having a second value, selectively clearing the TLB of a plurality of processors of the configuration.

8. A computer system for executing a Compare and Replace DAT Entry instruction, the system comprising:

a memory; and

a processor configured to communicate with the memory, wherein the computer system is configured to perform a method, the method comprising;

determining, by the processor, from an opcode of a machine executable instruction to be executed, that the instruction is a compare and replace DAT table entry instruction, the instruction comprising an R₁ field and an R₂ field; and

executing, by the processor, the instruction, the executing comprising;

obtaining an original second operand from a memory location specified by registers of an even-odd register pair designated by the R₂ field of the instruction;

comparing a first operand and the obtained original second operand, the first operand contained in an even-numbered (even R₁) register of an even-odd register pair designated by the R₁ field of the instruction;

based on the first operand being equal to the original second operand, storing the contents of the even R₁ register in the second operand location as the new second operand.

9. The system of claim 8, further comprising selectively clearing all local Translation Lookaside Buffer (TLB) entries corresponding to entries formed from DAT using translation table entries based on a translation table entry designated by a value of the original second operand.

10. The system of claim 8, comprising storing the original second operand into the even R₁ register based on the first operand being not equal to the original second operand.

11. The system of claim 9, wherein a translation table entry selectively cleared corresponds to lower level translation table entries associated with the original second operand.

12. The system according to claim 8, further comprising:

based on a first operand compare value being equal to the second operand, setting a first condition code value; and

based on a first operand compare value being not-equal to the second operand, setting a second condition code value.

13. The system of claim 9, wherein the TLB entries cleared are limited to entries formed to translate addresses in an address space specified by the instruction.

14. The system of claim 9, further comprising:

based on a mask field of the instruction having a first value, selectively clearing only a TLB of the processor executing the instruction of a plurality of processors of a configuration; and

based on a mask field of the instruction having a second value, selectively clearing the TLB of a plurality of processors of the configuration.

15. A computer implemented method for comparing a first and a second address translation table entry, the method comprising:

determining, by the processor, from an opcode of a machine executable instruction to be executed, that the instruction is a compare and replace DAT table entry instruction, the instruction comprising an R₁ field and an R₂ field; and

executing, by the processor, the instruction, the executing comprising;

obtaining an original second operand from a memory location specified by registers of an even-odd register pair designated by the R₂ field of the instruction;

comparing a first operand and the obtained original second operand, the first operand contained in an even-numbered (even R₁) register of an even-odd register pair designated by the R₁ field of the instruction;

based on the first operand being equal to the original second operand, storing the contents of the even R₁ register in the second operand location as the new second operand.

16. The method of claim 15, further comprising selectively clearing all local Translation Lookaside Buffer (TLB) entries corresponding to entries formed from DAT using translation table entries based on a translation table entry designated by a value of the original second operand.

17. The method of claim 15, comprising storing the original second operand into the even R₁ register based on the first operand being not equal to the original second operand.

18. The method of claim 16, wherein a translation table entry selectively cleared corresponds to lower level translation table entries associated with the original second operand.

19. The method according to claim 15, further comprising:

based on a first operand compare value being equal to the second operand, setting a first condition code value; and

based on a first operand compare value being not-equal to the second operand, setting a second condition code value.

20. The method of claim 16, wherein the TLB entries cleared are limited to entries formed to translate addresses in an address space specified by the instruction.

21. The method of claim 16, further comprising:

based on a mask field of the instruction having a first value, selectively clearing only a TLB of the processor executing the instruction of a plurality of processors of a configuration; and

based on a mask field of the instruction having a second value, selectively clearing the TLB of a plurality of processors of the configuration.