SOLID-STATE IMAGING DEVICE

• US 20130341491A1
• Filed: 08/27/2013
• Published: 12/26/2013
• Est. Priority Date: 03/01/2011
• Status: Abandoned Application

• Current Assignee: Panasonic Corporation (Panasonic Holdings Corporation)
• Original Assignee: Panasonic Corporation (Panasonic Holdings Corporation)
• Inventors: HIROSE, Yutaka, MIYAGAWA, Ryohei, KATO, Yoshihisa, UEDA, Tetsuya
• Application Number:
  US14/010,641
• Publication Number:
  US 20130341491A1
• Time in Patent Office: Days
• US Class Current: 250/208.1
• CPC Class Codes: H01L 27/14638 Structures specially adapted for transferring the charges across the imager perpendicular to the imaging plane
• CPC Class Codes: H01L 27/1464 Back illuminated imager structures
• CPC Class Codes: H01L 27/14667 Colour imagers
• CPC Class Codes: H04N 25/65 applied to reset noise, e.g. KTC noise related to CMOS structures by techniques other than CDS

Abstract

A solid-state imaging device includes: a substrate; a plurality of first electrodes arranged in a matrix above the substrate, and electrically isolated from each other; an insulator layer covering the first electrodes, having a planarized upper surface, and comprising an insulator; a photoelectric conversion film which is formed above the insulator layer, and converts light into signal charges; a second electrode formed above the photoelectric conversion film; and a signal readout circuit which is formed on the substrate, and generates a readout signal by detecting an amount of current change or voltage change caused by the signal charges at each of the first electrodes, in which the insulator layer allows conduction of at least electrons or holes by quantum mechanical tunneling.

Claims

1. A solid-state imaging device comprising:

a substrate;

a plurality of first electrodes arranged in a matrix above the substrate, and electrically isolated from each other;

an insulator layer covering the first electrodes, having a planarized upper surface, and comprising an insulator;

a photoelectric conversion film formed above the insulator layer, the photoelectric conversion film converting light into signal charges;

a second electrode formed above the photoelectric conversion film; and

a signal readout circuit formed on the substrate, the signal readout circuit generating a readout signal by detecting an amount of current change or voltage change caused by the signal charges at each of the first electrodes,

wherein the insulator layer allows conduction of at least electrons or holes by quantum mechanical tunneling.

2. The solid-state imaging device according to claim 1,

wherein the insulator layer above the first electrodes has a thickness ranging from 0.5 to 15 nm.

3. The solid-state imaging device according to claim 1,

wherein the insulator layer has a surface roughness of 1 nm or less.

4. The solid-state imaging device according to claim 1,

wherein the insulator layer includes at least one of a silicon oxide, an aluminum oxide, a titanium oxide, and a silicon nitride.

5. The solid-state imaging device according to claim 1,

wherein the insulator layer includes an oxide of a metal included in the first electrodes.

6. The solid-state imaging device according to claim 1,

wherein each of the first electrodes has a thickness of 15 nm or less.

7. The solid-state imaging device according to claim 1 further comprising

a potential supply layer formed below a space between adjacent ones of the first electrodes and between the adjacent first electrodes and the substrate, the potential supply layer being able to be set at an electrical potential independent of the adjacent first electrodes.

8. The solid-state imaging device according to claim 7,

wherein the solid-state imaging device provides, to the potential supply layer, the electrical potential for excluding the signal charges when the photoelectric conversion film converts the light into the signal charges and when the signal readout circuit generates the readout signal.

9. The solid-state imaging device according to claim 7,

wherein the insulator layer has an electrical property of conducting first type charges which are either the electrons or the holes and blocking second type charges which are different type charges from the first type charges,

the second type charges generated in the photoelectric conversion film are accumulated at an interface of the insulator layer facing to the photoelectric conversion film, and

the signal readout circuit generates the readout signal by detecting an amount of potential change caused by the accumulated second type charges.

10. The solid-state imaging device according to claim 9,

wherein the solid-state imaging device performs an initialization operation which neutralizes the second type charges accumulated at the interface by injecting the first type charges into the interface from each of the first electrodes via the insulator layer after the detecting of the amount of the potential change.

11. The solid-state imaging device according to claim 10,

wherein the signal readout circuit includes:

an amplification transistor having a gate terminal connected to one of the first electrodes, the amplification transistor generating the readout signal by amplifying the amount of the current change or voltage change at the one first electrode; and

a reset transistor connected to the one first electrode, the reset transistor providing a reset signal to the one first electrode, and

the solid-state imaging device further comprises a feedback amplifier which feeds back the readout signal to the reset signal, and performs, after the initialization operation, a reset operation which gradually turns off the reset transistor using a tapered gate voltage while the feedback amplifier feeds back the readout signal to the reset signal.

12. A method of manufacturing the solid-state imaging device according to claim 1, the method comprising:

patterning an electrode layer to form the first electrodes;

covering the first electrodes with an insulating film; and

planarizing the insulating film by etching back the insulating film to form the insulator layer.

13. A method of manufacturing the solid-state imaging device according to claim 1, the method comprising:

patterning an electrode layer to form a plurality of portions of the electrode layer arranged in a matrix above the substrate and electrically isolated from each other;

covering the portions of the electrode layer with a first insulating film;

planarizing the first insulating film and the portions of the electrode layer by etching back the first insulating film and the portions of the electrode layer at a same time to form a second insulating film and the first electrodes, respectively; and

depositing a third insulating film on the second insulating film and the first electrodes to form the insulator layer including the second insulating film and the third insulating film.