Absorbers for High-Efficiency Thin-Film PV

• US 20130344646A1
• Filed: 08/22/2013
• Published: 12/26/2013
• Est. Priority Date: 12/21/2011
• Status: Abandoned Application

• Current Assignee: Intermolecular Incorporated
• Original Assignee: Intermolecular Incorporated
• Inventors: Liang, Haifan, Van Duren, Jeroen
• Application Number:
  US13/973,199
• Publication Number:
  US 20130344646A1
• Time in Patent Office: Days
• US Class Current: 438/95
• CPC Class Codes: H01L 21/02551 Group 12/16 materials
• CPC Class Codes: H01L 21/02554 Oxides
• CPC Class Codes: H01L 21/02568 Chalcogenide semiconducting materials not being oxides, e.g. ternary compounds
• CPC Class Codes: H01L 21/02573 Conductivity type
• CPC Class Codes: H01L 21/02614 Transformation of metal, e.g. oxidation, nitridation
• CPC Class Codes: H01L 31/0322 comprising only AIBIIICVI chalcopyrite compounds, e.g. Cu In Se2, Cu Ga Se2, Cu In Ga Se2
• CPC Class Codes: H01L 31/0326 comprising AIBIICIVDVI kesterite compounds, e.g. Cu2ZnSnSe4, Cu2ZnSnS4
• CPC Class Codes: H01L 31/065 the potential barriers being only of the graded gap type
• CPC Class Codes: H01L 31/1832 comprising ternary compounds, e.g. Hg Cd Te
• CPC Class Codes: Y02E 10/541 CuInSe2 material PV cells
• CPC Class Codes: Y02P 70/50 Manufacturing or production processes characterised by the final manufactured product

Abstract

Methods are described for forming CIGS absorber layers in TFPV devices with graded compositions and graded band gaps. Methods are described for utilizing Ag to increase the band gap at the front surface of the absorber layer. Methods are described for utilizing Al to increase the band gap at the front surface of the absorber layer. Methods are described for utilizing at least one of Na, Mg, K, or Ca to increase the band gap at the front surface of the absorber layer.

Claims

1. A method for forming a semiconductor material on a substrate comprising:

forming a first layer above a surface of the substrate, wherein the first layer comprises In;

forming a second layer above the first layer, wherein the second layer comprises Cu;

forming a third layer above the second layer, wherein the third layer comprises Cu and Ga;

forming a fourth layer above the third layer, wherein the fourth layer comprises Ag; and

heating the first, second, third and fourth layers in the presence of a chalcogen at a temperature between about 100 C and 700 C.

2. The method of claim 1 wherein a composition of Cu as given by Cu/(In+Ga) is between 0.75 and 1.0.

3. The method of claim 1 wherein a composition of Ga as given by Ga/(Ga+In) is between 0.30 and 0.50.

4. The method of claim 1 wherein a composition of Ag as given by Ag/(Cu+Ag) is between 0.10 and 0.20.

5. The method of claim 1 wherein a thickness of the fourth layer is between 10 nm and 100 nm.

6. The method of claim 1 further comprising annealing the substrate after the heating step.

7. The method of claim 1 wherein the chalcogen comprises at least one of O, S, Se, or Te.

8. The method of claim 7 wherein the chalcogen comprises Se.

9. The method of claim 8 wherein the chalcogen comprises H₂Se.

10. The method of claim 1 wherein the first, second, third and fourth layers are deposited using a PVD process in a batch system.

11. The method of claim 1 wherein the first, second, third and fourth layers are deposited using a PVD process in an in-line system.