SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME

• US 20130344650A1
• Filed: 08/27/2013
• Published: 12/26/2013
• Est. Priority Date: 03/10/2011
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: NODA, Kosei
• Granted Patent: US 8,841,165 B2
• Time in Patent Office: Days
• US Class Current: 438/104
• CPC Class Codes: H01L 27/1207 combined with devices in contact with the semiconductor body, i.e. bulk/SOI hybrid circuits
• CPC Class Codes: H01L 29/66742 Thin film unipolar transistors
• CPC Class Codes: H01L 29/66969 of devices having semiconductor bodies not comprising group 14 or group 13/15 materials comprising selenium or tellurium in uncombined form other than as impurities in semiconductor bodies of other materials, comprising cuprous oxide or cuprous iodide H01L21/02365
• CPC Class Codes: H01L 29/78618 characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure silicide contacts, electrodes in general H01L29/458
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
• CPC Class Codes: H01L 29/78696 characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel H01L29/78612 takes precedence; transistors having a drain offset region or a lightly doped drain [LDD] H01L29/78621
• CPC Class Codes: H10B 41/70 the floating gate being an electrode shared by two or more components

Abstract

A semiconductor device includes an oxide semiconductor film including a pair of first regions, a pair of second regions, and a third region; a pair of electrodes in contact with the oxide semiconductor film; a gate insulating film over the oxide semiconductor film; and a gate electrode provided between the pair of electrodes with the gate insulating film interposed therebetween. The pair of first regions overlap with the pair of electrodes, the third region overlaps with the gate electrode, and the pair of second regions are formed between the pair of first regions and the third region. The pair of second regions and the third region each contain nitrogen, phosphorus, or arsenic. The pair of second regions have a higher element concentration than the third region.

Claims

1. A method for manufacturing a semiconductor device, comprising the steps of:

forming an oxide semiconductor film over an insulating surface;

forming a pair of electrodes over the oxide semiconductor film;

forming a gate insulating film covering the pair of electrodes and the oxide semiconductor film;

adding first ions to the oxide semiconductor film through the gate insulating film using the pair of electrodes as a mask;

forming a gate electrode overlapping with the oxide semiconductor film over the gate insulating film; and

adding second ions to the oxide semiconductor film using the gate electrode as a mask;

wherein the first ions and the second ions each comprise one of nitrogen, phosphorus, and arsenic.

2. The method for manufacturing a semiconductor device according to claim 1,

wherein a concentration of the first ions in the oxide semiconductor film is higher than or equal to 5×

10²⁰ atoms/cm³ and lower than 5×

10²¹ atoms/cm³, and wherein the sum of the concentration of the first ions and a concentration of the second ions in the oxide semiconductor film is higher than or equal to 5×

10²¹ atoms/cm³ and lower than 5×

10²² atoms/cm³.

3. The method for manufacturing a semiconductor device according to claim 1, wherein the oxide semiconductor film comprises two or more elements selected from the group consisting of In, Ga, Sn, and Zn.

4. The method for manufacturing a semiconductor device according to claim 1, wherein the oxide semiconductor film comprises In, Ga, and Zn.

5. The method for manufacturing a semiconductor device according to claim 1,

wherein the oxide semiconductor film comprises a pair of first regions that do not include the first ions, a pair of second regions including the first ions and the second ions, and a third region including the first ions by the steps of adding the first ions and adding the second ions,

wherein the pair of first regions are formed under the pair of electrodes,

wherein the pair of second regions are formed between the pair of first regions and the third region, and

wherein the third region is formed under the gate electrode.

6. The method for manufacturing a semiconductor device according to claim 5, wherein the pair of second regions and the third region comprise the same element selected from the group consisting of nitrogen, phosphorus, and arsenic.

7. The method for manufacturing a semiconductor device according to claim 1, wherein the oxide semiconductor film comprises a crystalline oxide semiconductor.

8. The method for manufacturing a semiconductor device according to claim 1, wherein the oxide semiconductor film comprises a crystalline oxide semiconductor with c-axis alignment.

9. A method for manufacturing a semiconductor device, comprising the steps of:

forming an oxide semiconductor film over an insulating surface;

forming a pair of electrodes over the oxide semiconductor film;

forming a gate insulating film over the oxide semiconductor film;

adding first ions to the oxide semiconductor film using the pair of electrodes as a mask;

forming a gate electrode over the oxide semiconductor film with the gate insulating film therebetween; and

adding second ions to the oxide semiconductor film using the gate electrode as a mask;

wherein the first ions and the second ions each comprise one of nitrogen, phosphorus, and arsenic.

10. The method for manufacturing a semiconductor device according to claim 9,

wherein a concentration of the first ions in the oxide semiconductor film is higher than or equal to 5×

10²⁰ atoms/cm³ and lower than 5×

10²¹ atoms/cm³, and

wherein the sum of the concentration of the first ions and a concentration of the second ions in the oxide semiconductor film is higher than or equal to 5×

10²¹ atoms/cm³ and lower than 5×

10²² atoms/cm³.

11. The method for manufacturing a semiconductor device according to claim 9, wherein the oxide semiconductor film comprises two or more elements selected from the group consisting of In, Ga, Sn, and Zn.

12. The method for manufacturing a semiconductor device according to claim 9, wherein the oxide semiconductor film comprises In, Ga, and Zn.

13. The method for manufacturing a semiconductor device according to claim 9,

wherein the oxide semiconductor film comprises a pair of first regions that do not include the first ions, a pair of second regions including the first ions and the second ions, and a third region including the first ions by the steps of adding the first ions and adding the second ions,

wherein the pair of first regions are formed under the pair of electrodes,

wherein the pair of second regions are formed between the pair of first regions and the third region, and

wherein the third region is formed under the gate electrode.

14. The method for manufacturing a semiconductor device according to claim 13, wherein the pair of second regions and the third region comprise the same element selected from the group consisting of nitrogen, phosphorus, and arsenic.

15. The method for manufacturing a semiconductor device according to claim 9, wherein the oxide semiconductor film comprises a crystalline oxide semiconductor.

16. The method for manufacturing a semiconductor device according to claim 9, wherein the oxide semiconductor film comprises a crystalline oxide semiconductor with c-axis alignment.