PRESERVING DATA OF A VOLATILE MEMORY

• US 20130346793A1
• Filed: 08/27/2013
• Published: 12/26/2013
• Est. Priority Date: 12/13/2010
• Status: Active Grant

• Current Assignee: SanDisk Technologies LLC (Western Digital Corporation)
• Original Assignee: Fusion-IO Incorporated (Western Digital Corporation)
• Inventors: Flynn, David, Nellans, David, Strasser, John, Peterson, James G., Wipfel, Robert
• Granted Patent: US 9,223,662 B2
• Time in Patent Office: Days
• US Class Current: 714/6.3
• CPC Class Codes: G06F 1/30 Means for acting in the event of power-supply failure or interruption, e.g. power-supply fluctuations for resetting only G06F1/24
• CPC Class Codes: G06F 11/1008 in individual solid state devices G06F11/1004 takes precedence
• CPC Class Codes: G06F 11/1441 Resetting or repowering
• CPC Class Codes: G06F 11/1666 where the redundant component is memory or memory area
• CPC Class Codes: G06F 11/2015 Redundant power supplies power supply failure G06F1/30
• CPC Class Codes: G06F 11/3034 where the computing system component is a storage system, e.g. DASD based or network based digital input from or digital output to record carriers G06F3/06; digital recording or reproducing G11B20/18; for distributed storage of data in networks, e.g. transport arrangements for network file system [NFS], storage area networks [SAN] or network attached storage [NAS], H04L67/1097
• CPC Class Codes: G06F 11/3058 Monitoring arrangements for monitoring environmental properties or parameters of the computing system or of the computing system component, e.g. monitoring of power, currents, temperature, humidity, position, vibrations thermal management in cooling arrangements of a computing system G06F1/206
• CPC Class Codes: G06F 12/0246 in block erasable memory, e.g. flash memory
• CPC Class Codes: G06F 12/0802 Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
• CPC Class Codes: G06F 2201/81 Threshold
• CPC Class Codes: G06F 2212/7207 management of metadata or control data
• CPC Class Codes: G06F 3/0619 in relation to data integrity, e.g. data losses, bit errors
• CPC Class Codes: G06F 3/0656 Data buffering arrangements
• CPC Class Codes: G06F 3/0679 Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]

Abstract

Apparatuses, systems, methods, and computer program products for auto-commit memory are presented. A monitor module determines that a triggering event for an auto-commit memory has occurred. An identification module identifies a triggered commit action for an auto-commit memory. An auto-commit memory module performs a triggered commit action for an auto-commit memory in response to a triggering event occurring.

Claims

1. A method comprising:

storing data in a volatile memory, the data associated with a logical identifier;

maintaining metadata associating the data with the logical identifier; and

writing the data from the volatile memory to a non-volatile memory medium in response to a failure event such that the data remains associated with the logical identifier.

2. The method of claim 1, further comprising mapping the volatile memory into a memory system of a host computing device in response to a request.

3. The method of claim 1, further comprising mapping the volatile memory into a memory system of a remote computing device using remote direct memory access (RDMA) such that the data of the volatile memory is accessible on the remote computing device using memory semantics.

4. The method of claim 1, further comprising preventing a read before write hazard based on the maintained metadata, the metadata tracking associations between the logical identifiers of a block device interface for the data and memory addresses for the data in the volatile memory.

5. The method of claim 1, further comprising disabling caching of memory operations for the volatile memory on a host computing device such that memory semantic operations for the volatile memory are performed directly on the volatile memory.

6. The method of claim 1, further comprising clearing the metadata in response to writing the data to the non-volatile memory medium.

7. The method of claim 1, wherein the logical identifier is associated with a physical location on the non-volatile memory medium of a non-volatile storage device.

8. The method of claim 1, wherein the non-volatile memory medium comprises a cache for a backing store and writing the data from the volatile memory to the non-volatile memory medium in response to the failure event preserves dirty data for migration from the cache to the backing store.

9. The method of claim 1, wherein the data comprises a durable synchronization primitive, the volatile memory mapped into different address ranges of a memory system such that the synchronization primitive has a same state for each of the different address ranges.

10. The method of claim 1, wherein the volatile memory is tightly coupled to a storage controller for the non-volatile memory medium, the storage controller configured to write the data from the volatile memory to the non-volatile memory medium independent of a host computing device.

11. An apparatus comprising:

a monitor module configured to determine that a triggering event for a volatile memory has occurred;

an identification module configured to identify a triggered commit action for the volatile memory; and

an auto-commit memory module configured to perform the triggered commit action for the volatile memory in response to the monitor module determining that the triggering event has occurred.

12. The apparatus of claim 11, further comprising an instant committed memory library configured to map the volatile memory into a memory system of a host computing device in response to a request.

13. The apparatus of claim 11, further comprising a storage layer configured to prevent a read before write hazard based on metadata maintained for data of the volatile memory, the metadata tracking associations between logical identifiers of a block device interface for the data of the volatile memory and memory addresses for the data of the volatile memory.

14. The apparatus of claim 11, further comprising a storage layer configured to disable caching of memory operations for the volatile memory on a host computing device such that memory semantic operations for the volatile memory are performed directly on the volatile memory.

15. The apparatus of claim 11, further comprising a storage layer configured to disarm the volatile memory by clearing the triggered commit action for the volatile memory in response to the auto-commit memory module performing the triggered commit action.

16. An apparatus comprising:

means for executing memory semantic operations on data in a volatile memory buffer;

means for arming the volatile memory buffer with metadata associating the data with a logical identifier of a non-volatile storage device; and

means for committing the data from the volatile memory buffer to the non-volatile storage device in response to a trigger.

17. The apparatus of claim 16, further comprising means for mapping the volatile memory buffer into a memory system of a host computing device in response to a request.

18. The apparatus of claim 16, further comprising means for preventing a read before write hazard based on the metadata, the metadata tracking associations between the logical identifier and memory addresses for the data of the volatile memory buffer.

19. The apparatus of claim 16, further comprising means for disabling caching of memory operations for the volatile memory buffer on a host computing device such that memory semantic operations for the volatile memory buffer are performed directly on the volatile memory buffer.

20. The apparatus of claim 16, further comprising means for disarming the volatile memory buffer by clearing the metadata in response to committing the data from the volatile memory buffer to the non-volatile storage device.