SOLID HOLE ARRAY AND MANUFACTURE METHOD THEREOF

• US 20140001646A1
• Filed: 07/31/2012
• Published: 01/02/2014
• Est. Priority Date: 06/29/2012
• Status: Active Grant

• Current Assignee: Institute of Microelectronics Chinese Academy of Sciences
• Original Assignee: Institute of Microelectronics Chinese Academy of Sciences
• Inventors: Zhao, Chao, Dong, Lijun
• Granted Patent: US 9,136,160 B2
• Time in Patent Office: Days
• US Class Current: 257/774
• CPC Class Codes: H01L 21/486 Via connections through the substrate with or without pins
• CPC Class Codes: H01L 21/76802 by forming openings in dielectrics
• CPC Class Codes: H01L 23/147 Semiconductor insulating substrates semiconductor conductive substrates H01L23/4926
• CPC Class Codes: H01L 23/49827 Via connections through the substrates, e.g. pins going through the substrate, coaxial cables H01L23/49822, H01L23/49833, H01L23/4985, H01L23/49861 take precedence
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

A solid hole array and a manufacture method thereof are provided. The method for manufacturing the solid hole array comprises: forming a top hole array base and a bottom hole array base on a top surface and a bottom surface of a substrate respectively; forming a front hole in the top hole array base; forming a top protection layer on the substrate with the top hole array base, and forming a bottom protection layer on the bottom hole array base; forming a rear window in the bottom hole array base and the bottom protection layer; and etching through the substrate by alkali corrosion to connect the front hole with the rear window. In addition, the present disclosure also provides a solid hole array. Using the method of the present disclosure, the intensity of the front film is enhanced, the process steps are simplified, the cost is decreased, and a large scale manufacture is more likely.

Claims

1. A method for manufacturing a solid hole array, comprises:

forming a top hole array base and a bottom hole array base on a top surface and a bottom surface of a substrate respectively;

forming a front hole in the top hole array base;

forming a top protection layer on the substrate with the top hole array base, and forming a bottom protection layer on the bottom hole array base;

forming a rear window in the bottom hole array base and the bottom protection layer; and

etching through the substrate by alkali corrosion to connect the front hole with the rear window.

2. The method according to claim 1, wherein the step of forming the front hole in the hole array base deposited on the top surface of the substrate further comprises:

coating a photoresist on the top hole array base, and forming the front hole in the top hole array base by a photolithography and a reactive ion etching to expose the substrate.

3. The method according to claim 1, wherein the step of forming the rear window in the protection layer deposited on the bottom surface of the substrate further comprises:

coating a photoresist on the bottom protection layer, and forming the rear window in the bottom hole array base and the bottom protection layer by a photolithography and a reactive ion etching to expose the substrate.

4. The method according to claim 1, wherein the thickness of the protection layer ranges from 8 nanometers to 20 nanometers.

5. The method according to claim 1, wherein the material of the top hole array base and the bottom hole array base is low stress silicon nitride or low stress silicon oxide.

6. The method according to claim 1, wherein the material of the top protection layer and the bottom protection layer is low temperature silicon nitride or low temperature silicon oxide.

7. The method according to claim 1, wherein the alkali corrosion is performed using KOH or tetramethylammonium hydroxide.

8. The method according to claim 1, wherein the width of the front hole is smaller than that of the rear window.

9. A solid hole array, comprises:

a substrate with a via;

a top hole array base formed on a top surface of the substrate and a bottom hole array base formed on a bottom surface of the substrate, wherein a front hole is located in the top hole array base at a place corresponding to the via; and

a top protection layer formed on a surface and sidewalls of the top hole array base and a bottom protection layer formed on a surface of the bottom hole array base, wherein a rear window is located in the bottom hole array base and the bottom protection layer at a place corresponding to the via.

10. The solid hole array according to claim 9, wherein the material of the top hole array base and the bottom hole array base is low stress silicon nitride or low stress silicon oxide.

11. The solid hole array according to claim 9, wherein the material of the top protection layer and the bottom protection layer is low temperature silicon nitride or low temperature silicon oxide.

12. The solid hole array according to claim 9, wherein the thickness of the protection layer ranges from 8 nanometers to 20 nanometers.

13. The solid hole array according to claim 9, wherein the width of the front hole is smaller than that of the rear window.