THIN FILM TRANSISTOR ARRAY SUBSTRATE AND LIQUID CRYSTAL DISPLAY USING THE SAME

• US 20140008670A1
• Filed: 06/26/2013
• Published: 01/09/2014
• Est. Priority Date: 07/04/2012
• Status: Abandoned Application

• Current Assignee: Mitsubishi Electric Corporation
• Original Assignee: Mitsubishi Electric Corporation
• Inventors: OKUMOTO, Kazunori
• Application Number:
  US13/928,090
• Publication Number:
  US 20140008670A1
• Time in Patent Office: Days
• US Class Current: 257/88
• CPC Class Codes: H01L 27/124 with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits wiring structures per se H01L23/52
• CPC Class Codes: H01L 29/41733 for thin film transistors with insulated gate
• CPC Class Codes: H01L 29/78696 characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel H01L29/78612 takes precedence; transistors having a drain offset region or a lightly doped drain [LDD] H01L29/78621
• CPC Class Codes: H01L 33/0041 characterised by field-effect operation

Abstract

A TFT array substrate includes a gate wiring for driving a pixel electrode constituting a pixel on an insulating substrate, a source wiring intersecting with the gate wiring through an insulating film, a source electrode connected to the source wiring, and a drain electrode provided opposite to the source electrode and connected to the pixel electrode. A semiconductor layer to be connected to the source electrode and the drain electrode is provided under the source electrode and the drain electrode. An end face of the semiconductor layer does not intersect with an end face of the source wiring, an end face of the source electrode and an end face of the drain electrode over the gate wiring, and a portion of the semiconductor layer which is positioned under the drain electrode has an end face to be included in the gate wiring as seen in a planar view.

Claims

1. A thin film transistor array substrate comprising:

a gate wiring for driving a pixel electrode constituting a pixel on an insulating substrate;

a source wiring intersecting with said gate wiring through an insulating film;

a source electrode connected to said source wiring;

a drain electrode provided opposite to said source electrode and connected to said pixel electrode; and

a semiconductor layer connected to said source electrode and said drain electrode and provided under said source electrode and said drain electrode,

wherein an end face of said semiconductor layer does not intersect with an end face of said source wiring, an end face of said source electrode and an end face of said drain electrode over said gate wiring, and

a portion of said semiconductor layer which is positioned under said drain electrode has an end face to be included in said gate wiring as seen in a planar view.

2. The thin film transistor array substrate according to claim 1, wherein said portion of said semiconductor layer which is positioned under said drain electrode includes:

a first portion protruded outward from said gate wiring as seen in a planar view and having an end face intersecting with said end face of said drain electrode; and

a second portion having an end face retracted from an end face of said gate wiring as seen in a planar view.

3. The thin film transistor array substrate according to claim 2, wherein a distance from said first portion to a surface of said drain electrode which is opposed to said source electrode is equal to or greater than 5 μ

m.

4. The thin film transistor array substrate according to claim 2, wherein said end face of said second portion is retracted from said end face of said gate wiring by 1.5 μ

m or more.

5. A liquid crystal display using the thin film transistor array substrate according to claim 1.

6. The liquid crystal display according to claim 5 which uses a lateral electric field method.

7. The liquid crystal display according to claim 5 comprising a backlight having a front luminance of 3000 cd/m² or more.