OPTIMIZING VIDEO STREAM PROCESSING

• US 20140009620A1
• Filed: 09/10/2013
• Published: 01/09/2014
• Est. Priority Date: 02/01/2010
• Status: Active Grant

• Current Assignee: Kyndryl Incorporated
• Original Assignee: International Business Machines Corporation
• Inventors: Bobbitt, Russell P., Fan, Quanfu, Miyazawa, Sachiko, Pankanti, Sharathchandra U., Zhai, Yun
• Granted Patent: US 9,197,868 B2
• Time in Patent Office: Days
• US Class Current: 348/150
• CPC Class Codes: G06Q 20/202 Interconnection or interaction of plural electronic cash registers [ECR] or to host computer, e.g. network details, transfer of information from host to ECR or from ECR to ECR
• CPC Class Codes: G06V 10/96 Management of image or video recognition tasks
• CPC Class Codes: G06V 20/52 Surveillance or monitoring of activities, e.g. for recognising suspicious objects recognising microscopic objects G06V20/69
• CPC Class Codes: H04N 7/181 for receiving images from a plurality of remote sources
• CPC Class Codes: H04N 7/188 Capturing isolated or intermittent images triggered by the occurrence of a predetermined event, e.g. an object reaching a predetermined position signal generation from motion picture films H04N5/253

Abstract

Transaction units of video data and transaction data captured from different checkout lanes are prioritized as a function of lane priority values of respective ones of the different checkout lanes from which the transaction units are acquired. Each of the checkout lanes has a different lane priority value. The individual transaction units are processed in the prioritized processing order to automatically detect irregular activities indicated by the transaction unit video and the transaction data of the processed individual transaction units.

Claims

1. A method, comprising:

prioritizing by a processor each transaction unit of a plurality of individual transaction units that each comprise transaction data and video data corresponding to an item purchased by a customer at one of a plurality of different checkout lanes into a prioritized processing order as a function of lane priority values of respective ones of the different checkout lanes that the transaction unit video data and transaction data is captured from for each of the individual transaction units, wherein each of the different checkout lanes has a different lane priority value; and

processing by the processor the individual transaction units in the prioritized processing order to automatically detect irregular activities indicated by the transaction unit video and the transaction data of the processed individual transaction units.

2. The method of claim 1, further comprising:

integrating computer-readable program code into a computer system comprising the processor, a computer readable memory and a computer readable tangible storage device, wherein the computer readable program code is embodied on the computer readable tangible storage device and comprises instructions that, when executed by the processor via the computer readable memory, cause the processor to perform the steps of prioritizing each transaction unit of the plurality of individual transaction units into the prioritized processing order as the function of lane priority values of respective ones of the different checkout lanes that the transaction unit video data and transaction data is captured from for each of the individual transaction units; and

processing the individual transaction units in the prioritized processing order to automatically detect irregular activities indicated by the transaction unit video and the transaction data of the processed individual transaction units.

3. The method of claim 1, further comprising:

assigning a first of the different lane priority values to a first of the different checkout lanes in response to determining that a first transaction within transaction data from the first lane comprises a plurality of voided items; and

assigning a second of the different lane priority values to a second of the different checkout lanes in response to determining that a second transaction within transaction data from the second lane comprises a voiding of all items within the second transaction.

4. The method of claim 3, further comprising:

assigning a third of the different lane priority values to a third of the different checkout lanes in response to determining that a third transaction within transaction data from the third lane comprises a long time duration between item scans in the third transaction.

5. The method of claim 4, further comprising:

the processor dynamically updating the lane priority value assigned to the first checkout lane to one of the second and third lane priority value as a function processing the individual transaction units in the prioritized processing order and thereby automatically detecting within video and transaction data captured from the first checkout lane that a fourth transaction within transaction data from the first lane comprises a long time duration between item scans in the fourth transaction, or that a fifth transaction within transaction data from the first lane comprises a voiding of all items within the fifth transaction; and

subsequently determining processing priority by the processor for each transaction unit of the individual transaction units captured from others of the different checkout lanes as a function of the updated lane priority value of the first checkout lane.

6. The method of claim 5, wherein the step of the processor processing the individual transaction units in the prioritized processing order comprises:

processing a high priority fraction of a total of the prioritized individual transaction units in the prioritized processing order; and

archiving a low priority remainder fraction of the total of the individual transaction units that each have a lower priority than the high priority fraction individual transaction units within the prioritized processing order.

7. The method of claim 6, wherein the step of prioritizing the individual transaction units further comprises placing the transactions units in a transaction priority queue in an order of relative priority;

and

wherein the step of the processor archiving the low priority remainder fraction of the total of the individual transaction units further comprises moving the low priority remainder fraction transaction units from the transaction priority queue to an archival queue in an order of relative priority.

8. The method of claim 7, further comprising the processor moving unprocessed transaction units from the transaction priority queue to the archival queue at regular intervals.

9. The method of claim 8, further comprising the processor processing the low priority remainder fraction individual transaction units archived in the archival queue in order of their relative queued priority to automatically detect activities indicated by the transaction unit video and the transaction data of the processed transaction units when the processor has unused capacity.

10. The method of claim 9, further comprising:

obtaining by the processor streams of video and transaction data captured from each of the plurality of different checkout lanes; and

combining by the processor the streams of video and transaction data for each respective one of the different checkout lanes into the individual transaction units so that each of the individual transaction units comprises transaction video corresponding to a set of items purchased by a single customer at one of the different checkout lanes in a single span of time.

11. A system, comprising:

a processor in communication with a computer-readable memory and a computer-readable storage device;

wherein the processor, when executing program instructions stored on the computer-readable storage device via the computer-readable memory;

prioritizes each transaction unit of a plurality of individual transaction units that each comprise transaction data and video data corresponding to an item purchased by a customer at one of a plurality of different checkout lanes into a prioritized processing order as a function of lane priority values of respective ones of the different checkout lanes that the transaction unit video data and transaction data is captured from for each of the individual transaction units, wherein each of the different checkout lanes has a different lane priority value; and

processes the individual transaction units in the prioritized processing order to automatically detect irregular activities indicated by the transaction unit video and the transaction data of the processed individual transaction units.

12. The system of claim 11, wherein the processor, when executing the program instructions stored on the computer-readable storage device via the computer-readable memory, further:

assigns a first of the different lane priority values to a first of the different checkout lanes in response to determining that a first transaction within transaction data from the first lane comprises a plurality of voided items; and

assigns a second of the different lane priority values to a second of the different checkout lanes in response to determining that a second transaction within transaction data from the second lane comprises a voiding of all items within the second transaction.

13. The system of claim 12, wherein the processor, when executing the program instructions stored on the computer-readable storage device via the computer-readable memory, further:

assigns a third of the different lane priority values to a third of the different checkout lanes in response to determining that a third transaction within transaction data from the third lane comprises a long time duration between item scans in the third transaction.

14. The system of claim 13, wherein the processor, when executing the program instructions stored on the computer-readable storage device via the computer-readable memory, further:

dynamically updates the lane priority value assigned to the first checkout lane to one of the second and third lane priority value as a function processing the individual transaction units in the prioritized processing order and thereby automatically detecting within video and transaction data captured from the first checkout lane that a fourth transaction within transaction data from the first lane comprises a long time duration between item scans in the fourth transaction, or that a fifth transaction within transaction data from the first lane comprises a voiding of all items within the fifth transaction; and

subsequently determines processing priority for each transaction unit of the individual transaction units captured from others of the different checkout lanes as a function of the updated lane priority value of the first checkout lane.

15. The system of claim 14, wherein the processor, when executing the program instructions stored on the computer-readable storage device via the computer-readable memory, processes the individual transaction units in the prioritized processing by:

processing a high priority fraction of a total of the prioritized individual transaction units in the prioritized processing order; and

archiving a low priority remainder fraction of the total of the individual transaction units that each have a lower priority than the high priority fraction individual transaction units within the prioritized processing order.

16. An article of manufacture, comprising:

a computer-readable tangible storage device having computer readable program code embodied therewith, the computer readable program code comprising instructions that, when executed by a processor, cause the processor to;

prioritize each transaction unit of a plurality of individual transaction units that each comprise transaction data and video data corresponding to an item purchased by a customer at one of a plurality of different checkout lanes into a prioritized processing order as a function of lane priority values of respective ones of the different checkout lanes that the transaction unit video data and transaction data is captured from for each of the individual transaction units, wherein each of the different checkout lanes has a different lane priority value; and

process the individual transaction units in the prioritized processing order to automatically detect irregular activities indicated by the transaction unit video and the transaction data of the processed individual transaction units.

17. The article of manufacture of claim 16, wherein the computer-readable program code instructions, when executed by the processor, further cause the processor to:

assign a first of the different lane priority values to a first of the different checkout lanes in response to determining that a first transaction within transaction data from the first lane comprises a plurality of voided items;

assign a second of the different lane priority values to a second of the different checkout lanes in response to determining that a second transaction within transaction data from the second lane comprises a voiding of all items within the second transaction; and

assign a third of the different lane priority values to a third of the different checkout lanes in response to determining that a third transaction within transaction data from the third lane comprises a long time duration between item scans in the third transaction.

18. The article of manufacture of claim 17, wherein the computer-readable program code instructions, when executed by the processor, further cause the processor to:

prioritize the individual transaction units by placing the transactions units in a transaction priority queue in an order of relative priority;

process a high priority fraction of a total of the prioritized individual transaction units in the transaction priority queue in the order of relative priority; and

archive a low priority remainder fraction of the total of the individual transaction units that each have a lower priority than the high priority fraction individual transaction units by moving the low priority remainder fraction transaction units from the transaction priority queue to an archival queue in an order of relative priority.

19. The article of manufacture of claim 18, wherein the computer-readable program code instructions, when executed by the processor, further cause the processor to process the low priority remainder fraction individual transaction units archived in the archival queue in order of their relative queued priority to automatically detect activities indicated by the transaction unit video and the transaction data of the processed transaction units when the processor has unused capacity.

20. The article of manufacture of claim 18, wherein the computer-readable program code instructions, when executed by the processor, further cause the processor to:

obtain streams of video and transaction data captured from each of the plurality of different checkout lanes; and

combine the streams of video and transaction data for each respective one of the different checkout lanes into the individual transaction units so that each of the individual transaction units comprises transaction video corresponding to a set of items purchased by a single customer at one of the different checkout lanes in a single span of time.