HYBRID MEMORY WITH ASSOCIATIVE CACHE
First Claim
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1. A device, comprising:
- a primary memory comprising a host memory space arranged as memory sectors corresponding to host logical block addresses (LBAs);
a secondary memory implemented as a cache for the primary host memory; and
a hybrid controller configured map clusters of host LBAs to clusters of solid state drive (SSD) LBAs, the SSD LBAs corresponding to a memory space of the cache, the mapping of the host LBA clusters to the SSD LBA clusters being fully associative wherein any host LBA cluster can be mapped to any SSD LBA cluster.
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Abstract
A hybrid memory system includes a primary memory comprising a host memory space arranged as memory sectors corresponding to host logical block addresses (host LBAs). A secondary memory is implemented as a cache for the primary host memory. A hybrid controller is configured map the clusters of host LBAs to clusters of solid state drive (SSD) LBAs. The SSD LBAs correspond to a memory space of the cache. Mapping of the host LBA clusters to the SSD LBA clusters is fully associative such that any host LBA cluster can be mapped to any SSD LBA cluster.
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Citations
20 Claims
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1. A device, comprising:
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a primary memory comprising a host memory space arranged as memory sectors corresponding to host logical block addresses (LBAs); a secondary memory implemented as a cache for the primary host memory; and a hybrid controller configured map clusters of host LBAs to clusters of solid state drive (SSD) LBAs, the SSD LBAs corresponding to a memory space of the cache, the mapping of the host LBA clusters to the SSD LBA clusters being fully associative wherein any host LBA cluster can be mapped to any SSD LBA cluster. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
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11. A method, comprising:
mapping clusters of host logical block addresses (LBAs) corresponding to a host LBA space to solid state drive (SSD) LBA clusters, the host LBA space corresponding to a memory space of a primary memory and the SSD LBA clusters corresponding to memory space of a secondary memory arranged to operate as a fully associative cache for the primary memory, wherein any host LBA cluster can be mapped to any SSD LBA cluster. - View Dependent Claims (12, 13, 14, 15, 16, 17, 18)
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19. A device, comprising:
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a hard magnetic disk drive (HDD) comprising a memory space arranged as memory sectors corresponding to host logical block addresses (LBAs); flash memory implemented as a cache for the HDD; and a hybrid controller configured map the clusters of host LBAs to clusters of solid state drive (SSD) LBAs, the SSD LBAs corresponding to a memory space of the flash memory, the mapping of the host LBA clusters to the SSD LBA clusters being fully associative wherein any host LBA cluster can be mapped to any SSD LBA cluster. - View Dependent Claims (20)
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Specification