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DEBUG ARCHITECTURE

  • US 20140013172A1
  • Filed: 07/09/2013
  • Published: 01/09/2014
  • Est. Priority Date: 07/09/2012
  • Status: Active Grant
First Claim
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1. A method of controlling transportation of debug data on an integrated circuit chip, the integrated circuit chip comprising a shared hub and a plurality of peripheral circuits, each peripheral circuit being connected to a respective debug unit, wherein between each respective debug unit and the shared hub there is an interface configured to transport data messages over each of a plurality of flows, the flows being assigned priorities, the method comprising:

  • transporting control data for controlling the state of a debug unit on a priority flow having a first priority; and

    transporting debug data output by a debug unit as a result of debugging the peripheral circuit connected to that debug unit on a flow having a second priority, wherein the first priority is higher than the second priority.

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