TRENCH GATE MOSFET

• US 20140015041A1
• Filed: 03/08/2013
• Published: 01/16/2014
• Est. Priority Date: 07/13/2012
• Status: Active Grant

• Current Assignee: uPI Semiconductor Corporation
• Original Assignee: UBIQ Semiconductor Corp.
• Inventors: Chan, Chien-Ling, Lee, Chi-Hsiang
• Granted Patent: US 9,035,283 B2
• Time in Patent Office: Days
• US Class Current: 257/330
• CPC Class Codes: H01L 29/407 Recessed field plates, e.g. trench field plates, buried field plates
• CPC Class Codes: H01L 29/41766 with at least part of the source or drain electrode having contact below the semiconductor surface, e.g. the source or drain electrode formed at least partially in a groove or with inclusions of conductor inside the semiconductor H01L29/41733 - H01L29/41758 take precedence
• CPC Class Codes: H01L 29/42368 the thickness being non-uniform
• CPC Class Codes: H01L 29/4916 the conductor material next to the insulator being a silicon layer, e.g. polysilicon doped with boron, phosphorus or nitrogen H01L29/4908, H01L29/4983 take precedence
• CPC Class Codes: H01L 29/66727 with a step of recessing the source electrode
• CPC Class Codes: H01L 29/66734 with a step of recessing the gate electrode, e.g. to form a trench gate electrode
• CPC Class Codes: H01L 29/7813 with trench gate electrode, e.g. UMOS transistors trench gate electrodes per se H01L29/4236
• CPC Class Codes: H01L 29/7827 Vertical transistors H01L29/7802, H01L29/78642 take precedence

Abstract

A trench gate MOSFET is provided. An epitaxial layer is disposed on a substrate. A body layer is disposed in the epitaxial layer. The epitaxial layer has a first trench therein, the body layer has a second trench therein, and the first trench is disposed below the second trench. A first conductive layer is disposed in the first trench. A first insulating layer is disposed between the first conductive layer and the epitaxial layer. A second conductive layer is disposed on a sidewall of the second trench. A second insulating layer is disposed between the second conductive layer and the body layer, and between the second conductive layer and the first conductive layer. A dielectric layer is disposed on the epitaxial layer and fills up the second trench. Two doped regions are disposed in the body layer respectively beside the second trench.

Claims

1. A trench gate MOSFET, comprising:

a substrate with a first conductivity type;

an epitaxial layer with the first conductivity type disposed on the substrate;

a body layer with a second conductivity type disposed in the epitaxial layer, wherein the epitaxial layer has a first trench therein, the body layer has a second trench therein, and the first trench is disposed below the second trench;

a first conductive layer disposed in the first trench;

a first insulating layer disposed between the first conductive layer and the epitaxial layer;

a second conductive layer disposed on a sidewall of the second trench;

a second insulating layer disposed between the second conductive layer and the body layer, and between the second conductive layer and the first conductive layer;

a dielectric layer disposed on the epitaxial layer and filling up the second trench; and

two doped regions with the first conductivity type disposed in the body layer respectively beside the second trench.

2. The trench gate MOSFET as recited in claim 1, wherein a thickness of the second insulating layer is smaller than a thickness of the first insulating layer.

3. The trench gate MOSFET as recited in claim 1, wherein the second insulating layer covers a top of the first conductive layer.

4. The trench gate MOSFET as recited in claim 1, wherein the first conductive layer further extends into the second trench.

5. The trench gate MOSFET as recited in claim 1, wherein a material of the first conductive layer comprises doped polysilicon.

6. The trench gate MOSFET as recited in claim 1, wherein a material of the second conductive layer comprises doped polysilicon.

7. The trench gate MOSFET as recited claim 1 further comprising a third conductive layer disposed on the dielectric layer, wherein the third conductive layer is electrically connected to the body layer via two conductor plugs.

8. The trench gate MOSFET as recited in claim 7, wherein a material of the third conductive layer comprises metal.

9. The trench gate MOSFET as recited in claim 1, wherein the first conductivity type is N-type and the second conductivity type is P-type;

or the first conductivity type is P-type and the second conductivity type is N-type.

10. A trench gate MOSFET, comprising:

a substrate with a first conductivity type;

an epitaxial layer with the first conductivity type disposed on the substrate;

a body layer with a second conductivity type disposed in the epitaxial layer, wherein the epitaxial layer has a first trench therein, the body layer has a second trench therein, and the first trench is disposed below the second trench;

a first conductive layer disposed in the first trench;

a first insulating layer disposed between the first conductive layer and the epitaxial layer;

a second insulating layer disposed in the second trench and covering the first conductive layer;

a second conductive layer disposed in the second trench and covering the second insulating layer;

a third insulating layer disposed between the second conductive layer and the body layer;

a dielectric layer disposed on the epitaxial layer and covering the second conductive layer; and

two doped regions with the first conductivity type disposed in the body layer respectively beside the second trench.

11. The trench gate MOSFET as recited in claim 10, wherein a thickness of the third insulating layer is smaller than a thickness of the first insulating layer.

12. The trench gate MOSFET as recited in claim 10, wherein a width of the second insulating layer is greater than a width of the first conductive layer.

13. The trench gate MOSFET as recited in claim 10, wherein a material of the first conductive layer comprises doped polysilicon.

14. The trench gate MOSFET as recited in claim 10, wherein a material of the second conductive layer comprises doped polysilicon.

15. The trench gate MOSFET as recited in claim 10 further comprising a third conductive layer disposed on the dielectric layer, wherein the third conductive layer is electrically connected to the body layer via two conductor plugs.

16. The trench gate MOSFET as recited in claim 15, wherein a material of the third conductive layer comprises metal.

17. The trench gate MOSFET as recited in claim 10, wherein the first conductivity type is N-type and the second conductivity type is P-type;

or the first conductivity type is P-type and the second conductivity type is N-type.