METHOD TO IMPROVE WITHIN WAFER UNIFORMITY OF CMP PROCESS
First Claim
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1. A system for controlling a thickness profile of a wafer comprising:
- a control model;
a chemical mechanical planarization tool; and
at least one sensor,wherein the control model receives the thickness profile of the wafer measured by the at least one sensor and determines a control profile for the chemical mechanical planarization tool.
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Abstract
Closed loop control may be used to improve uniformity of within wafer uniformity using chemical mechanical planarization. For example, closed loop control may be used to determine a control profile for a chemical mechanical planarization process to more uniformly and consistently achieve the desired extent of variation of within wafer uniformity of a semiconductor wafer.
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Citations
20 Claims
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1. A system for controlling a thickness profile of a wafer comprising:
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a control model; a chemical mechanical planarization tool; and at least one sensor, wherein the control model receives the thickness profile of the wafer measured by the at least one sensor and determines a control profile for the chemical mechanical planarization tool. - View Dependent Claims (2, 3, 4, 5, 6, 7)
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- 8. A chemical mechanical planarization tool comprising a polishing head having a plurality of heat applied to a series of points across the polishing head, wherein the plurality of heat applied to the series of points is controlled to achieve a desired thickness profile of a wafer that is polished using the chemical mechanical planarization tool.
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11. A method for controlling a thickness profile of a wafer, comprising:
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specifying a target for the thickness profile; measuring the thickness profile of the wafer; determining a control profile for a chemical mechanical planarization process using the measured thickness profile, the target, and a control model; applying the control profile to the chemical mechanical planarization process; and polishing the wafer using the chemical mechanical planarization process and the applied control profile. - View Dependent Claims (12, 13, 14, 15, 16)
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17. A wafer for a semiconductor fabricated by a process comprising:
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specifying a target for the thickness profile; measuring the thickness profile of the wafer; determining a control profile for a chemical mechanical planarization process using the measured thickness profile, the target, and a control model; applying the control profile to the chemical mechanical planarization process; and polishing the wafer using the chemical mechanical planarization process and the applied control profile. - View Dependent Claims (18, 19, 20)
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Specification