METHOD OF COATING WATER SOLUBLE MASK FOR LASER SCRIBING AND PLASMA ETCH

• US 20140017882A1
• Filed: 06/13/2013
• Published: 01/16/2014
• Est. Priority Date: 07/13/2012
• Status: Active Grant

• Current Assignee: Applied Materials Incorporated
• Original Assignee: Applied Materials Incorporated
• Inventors: Lei, Wei-Sheng, Eaton, Brad, Iyer, Aparna, Egan, Todd, Yalamanchili, Madhava Rao, Kumar, Ajay
• Granted Patent: US 8,859,397 B2
• Time in Patent Office: Days
• US Class Current: 438/465
• CPC Class Codes: H01L 21/3065 Plasma etching; Reactive-ion etching
• CPC Class Codes: H01L 21/308 using masks H01L21/3063, H01L21/3065 take precedence
• CPC Class Codes: H01L 21/3081 characterised by their composition, e.g. multilayer masks, materials
• CPC Class Codes: H01L 21/31127 Etching organic layers
• CPC Class Codes: H01L 21/78 with subsequent division of the substrate into plural individual devices cutting to change the surface-physical characteristics or shape of semiconductor bodies H01L21/304
• CPC Class Codes: H01L 21/82 to produce devices, e.g. integrated circuits, each consisting of a plurality of components

Abstract

Methods of using a hybrid mask composed of a first water soluble film layer and a second water-soluble layer for wafer dicing using laser scribing and plasma etch described. In an example, a method of dicing a semiconductor wafer having a plurality of integrated circuits involves forming a hybrid mask above the semiconductor wafer. The hybrid mask is composed of a first water-soluble layer disposed on the integrated circuits, and a second water-soluble layer disposed on the first water-soluble layer. The method also involves patterning the hybrid mask with a laser scribing process to provide a patterned hybrid mask with gaps, exposing regions of the semiconductor wafer between the integrated circuits. The method also involves etching the semiconductor wafer through the gaps in the patterned hybrid mask to singulate the integrated circuits.

Claims

1. A method of dicing a semiconductor wafer comprising a plurality of integrated circuits, the method comprising:

forming a hybrid mask above the semiconductor wafer, the hybrid mask comprising a first water-soluble layer disposed on the integrated circuits, and a second water-soluble layer disposed on the first water-soluble layer;

patterning the hybrid mask with a laser scribing process to provide a patterned hybrid mask with gaps, exposing regions of the semiconductor wafer between the integrated circuits; and

etching the semiconductor wafer through the gaps in the patterned hybrid mask to singulate the integrated circuits.

2. The method of claim 1, wherein forming the hybrid mask comprises forming the first water-soluble layer with a thickness less than the thickness of the second water-soluble layer.

3. The method of claim 1, wherein forming the hybrid mask comprises forming the first water-soluble layer with a viscosity less than the viscosity of the second water-soluble layer.

4. The method of claim 1, wherein the first water-soluble layer is applied with a first spin-on process and then baked and, subsequently, the second water-soluble layer is applied with a second spin-on process and then baked.

5. The method of claim 4, wherein the first spin on process is performed at a faster spin rate than the second spin on process.

6. The method of claim 1, wherein the first water-soluble layer is bubble-free and the second water-soluble layer comprises one or more bubbles.

7. The method of claim 1, further comprising:

subsequent to etching the semiconductor wafer, removing the patterned hybrid mask.

8. The method of claim 7, wherein the removing comprises exposing the patterned hybrid mask to an aqueous solution.

9. The method of claim 8, wherein exposing the patterned hybrid mask to the aqueous solution comprises exposing to one or more of an alkaline solution, an acidic solution, or deionized water.

10. The method of claim 1, wherein one or the first water-soluble layer or the second water-soluble layer comprises a material selected from the group consisting of polyvinyl alcohol, polyacrylic acid, dextran, polymethacrylic acid, polyethylene imine, and polyethylene oxide.

11. A method of dicing a semiconductor wafer comprising a plurality of integrated circuits, the method comprising:

forming a hybrid mask above the semiconductor wafer, the hybrid mask comprising a first water-soluble layer disposed on the integrated circuits, and a second water-soluble layer disposed on the first water-soluble layer, wherein forming the hybrid mask comprises forming the first water-soluble layer with a thickness less than the thickness of the second water-soluble layer, and forming the first water-soluble layer with a viscosity less than the viscosity of the second water-soluble layer, and wherein the first water-soluble layer is applied with a first spin-on process and then baked and, subsequently, the second water-soluble layer is applied with a second spin-on process and then baked;

patterning the hybrid mask with a laser scribing process to provide a patterned hybrid mask with gaps, exposing regions of the semiconductor wafer between the integrated circuits; and

etching the semiconductor wafer through the gaps in the patterned hybrid mask to singulate the integrated circuits.

12. The method of claim 11, wherein the first spin-on process is performed at a faster spin rate than the second spin-on process.

13. The method of claim 11, wherein the first water-soluble layer is bubble-free and the second water-soluble layer comprises one or more bubbles.

14. The method of claim 11, further comprising:

subsequent to etching the semiconductor wafer, removing the patterned hybrid mask, the removing comprising exposing the patterned hybrid mask to an aqueous solution.

15. The method of claim 14, wherein exposing the patterned hybrid mask to the aqueous solution comprises exposing to one or more of an alkaline solution, an acidic solution, or deionized water.

16. The method of claim 11, wherein one or the first water-soluble layer or the second water-soluble layer comprises a material selected from the group consisting of polyvinyl alcohol, polyacrylic acid, dextran, polymethacrylic acid, polyethylene imine, and polyethylene oxide.

17. A method of dicing a semiconductor wafer comprising a plurality of integrated circuits, the method comprising:

forming a hybrid mask above the semiconductor wafer, the hybrid mask comprising a first water-soluble layer disposed on the integrated circuits, and a second water-soluble layer disposed on the first water-soluble layer;

patterning the hybrid mask with a laser scribing process to provide a patterned hybrid mask with gaps, exposing regions of the semiconductor wafer between the integrated circuits;

etching the semiconductor wafer through the gaps in the patterned hybrid mask to singulate the integrated circuits; and

, subsequently,

removing the patterned hybrid mask by exposing the patterned hybrid mask to an aqueous solution comprising one or more of an alkaline solution, an acidic solution, or deionized water.

18. The method of claim 17, wherein the first water-soluble layer is bubble-free and the second water-soluble layer comprises one or more bubbles.

19. The method of claim 17, wherein one or the first water-soluble layer or the second water-soluble layer comprises a material selected from the group consisting of polyvinyl alcohol, polyacrylic acid, dextran, polymethacrylic acid, polyethylene imine, and polyethylene oxide.

20. The method of claim 17, wherein forming the hybrid mask comprises forming the first water-soluble layer with a thickness less than the thickness of the second water-soluble layer.