Method of Improving Data Transmission and Related Computer System

• US 20140026001A1
• Filed: 11/29/2012
• Published: 01/23/2014
• Est. Priority Date: 07/19/2012
• Status: Abandoned Application

• Current Assignee: Wistron Corporation
• Original Assignee: Wistron Corporation
• Inventors: Lin, Margaret-Peyi
• Application Number:
  US13/688,224
• Publication Number:
  US 20140026001A1
• Time in Patent Office: Days
• US Class Current: 714/47.1
• CPC Class Codes: G06F 11/0745 in an input/output transactions management context input/output processing in general G06F13/00
• CPC Class Codes: G06F 11/0757 by exceeding a time limit, i.e. time-out, e.g. watchdogs
• CPC Class Codes: G06F 11/1443 Transmit or communication errors
• CPC Class Codes: G06F 11/3003 Monitoring arrangements specially adapted to the computing system or computing system component being monitored

Abstract

A method of improving a data transmission for a firmware in a computer system is disclosed. The method includes monitoring a time-out count, a roll-over count, and an error flag of the data transmission when the data transmission is performed via a high-speed bus; and determining whether to send an interrupt command to a BIOS according to the time-out count, the roll-over count, and the error flag.

Claims

1. A method of improving a data transmission for a firmware in a computer system, the method comprising:

monitoring a time-out count, a roll-over count, and an error flag of the data transmission when the data transmission is performed via a high-speed bus; and

determining whether to send an interrupt command to a basic input output system (BIOS) according to the time-out count, the roll-over count, and the error flag.

2. The method of claim 1, wherein determining whether to send the interrupt command to the BIOS according to the time-out count and the roll-over count comprises sending the interrupt command to the BIOS when the time-out count or the roll-over count is greater than a threshold value.

3. The method of claim 1, wherein determining whether to send the interrupt command to the BIOS according to the error flag comprises sending the interrupt command to the BIOS when the error flag is set to be “

1”

.

4. The method of claim 3 further comprising setting the error flag to be “

1”

when at least one of a fatal error, an uncorrectable error, and a signal system error occurs.

5. A method of improving a data transmission for a basic input output system (BIOS) of a computer system, the method comprising:

checking a low-speed flag before the data transmission starts; and

determining whether to adjust a de-emphasis level according to the low-speed flag, wherein the de-emphasis level is related to a transmission rate of the data transmission.

6. The method of claim 5, wherein determining whether to adjust the de-emphasis level according to the low-speed flag comprises starting to perform the data transmission via a high-speed bus when the low-speed flag is set to be “

0” and

reducing the de-emphasis level to reduce the transmission rate of the data transmission when the low-speed flag is set to be “

1”

.

7. The method of claim 6, wherein reducing the transmission rate of the data transmission comprises starting to perform the data transmission via a low-speed bus.

8. The method of claim 5 further comprising reducing the de-emphasis level and setting the low-speed flag to be “

1”

when receiving an interrupt command, wherein the interrupt command is related to a transmission error of the data transmission.

9. The method of claim 8, wherein the transmission error of the data transmission comprises at least one of a time-out count or a roll-over count of the data transmission greater than a threshold value, occurrence of a fatal error, occurrence of an uncorrectable error, and occurrence of a signal system error.

10. The method of claim 8 further comprising determining whether to reset or restart the computer system when the low-speed flag is set to be “

1”

.

11. The method of claim 10 further comprising resetting the low-speed flag to be “

0”

when determining to reset or restart the computer system.

12. The method of claim 10 further comprising remaining the low-speed flag as “

1”

when determining not to reset or restart the computer system.

13. A computer system for improving a data transmission, the computer system comprising:

a firmware, for monitoring a time-out count, a roll-over count, and an error flag of the data transmission and determining whether to send an interrupt command according to the time-out count, the roll-over count, and the error flag; and

a basic input output system (BIOS), for setting a low-speed flag according to the interrupt command and determining whether to adjust a de-emphasis level according to the low-speed flag.

14. The computer system of claim 13, wherein the firmware determining whether to send the interrupt command to the BIOS according to the time-out count and the roll-over count comprises the firmware sending the interrupt command to the BIOS when the time-out count or the roll-over count is greater than a threshold value.

15. The computer system of claim 13, wherein the firmware determining whether to send the interrupt command to the BIOS according to the error flag comprises the firmware sending the interrupt command to the BIOS when the error flag is set to be “

1”

.

16. The computer system of claim 13, wherein the firmware is further utilized for setting the error flag to be “

1”

when at least one of a fatal error, an uncorrectable error, and a signal system error occurs.

17. The computer system of claim 13, wherein the BIOS is further utilized for checking the low-speed flag before a data transmission starts.

18. The computer system of claim 13, wherein the BIOS determining whether to adjust the de-emphasis level according to the low-speed flag comprises starting to perform the data transmission via a high-speed bus when the low-speed flag is set to be “

0” and

reducing the de-emphasis level to reduce the transmission rate of the data transmission when the low-speed flag is set to be “

1”

.

19. The computer system of claim 18, wherein the BIOS reducing the transmission rate of the data transmission comprises the BIOS starting to perform the data transmission via a low-speed bus.

20. The computer system of claim 13, wherein the BIOS setting the low-speed flag according to the interrupt command comprises the BIOS reducing the de-emphasis level and setting the low-speed flag to be “

1”

when receiving the interrupt command.

21. The computer system of claim 20, wherein the BIOS is further utilized for determining whether to reset or restart the computer system when the low-speed flag is set to be “

1”

.

22. The computer system of claim 21, wherein the BIOS is further utilized for resetting the low-speed flag to be “

0”

when determining to reset or restart the computer system.

23. The computer system of claim 21, wherein the BIOS is further utilized for remaining the low-speed flag as “

1”

when determining not to reset or restart the computer system.