TUNED RESONANT CLOCK DISTRIBUTION SYSTEM

• US 20140035649A1
• Filed: 07/31/2012
• Published: 02/06/2014
• Est. Priority Date: 07/31/2012
• Status: Abandoned Application

• Current Assignee: Fujitsu Limited
• Original Assignee: Fujitsu Limited
• Inventors: NEDOVIC, Nikola
• Application Number:
  US13/563,507
• Publication Number:
  US 20140035649A1
• Time in Patent Office: Days
• US Class Current: 327/299
• CPC Class Codes: G06F 1/08 Clock generators with changeable or programmable clock frequency
• CPC Class Codes: G06F 1/10 Distribution of clock signals , e.g. skew

Abstract

A tunable clock distribution system that includes a clock network including an inductive circuit and a capacitive circuit where at least one of the capacitive circuit or the inductive circuit is tunable. The tunable clock distribution system may further include a driving circuit and a phase determiner. The driving circuit may be configured to receive a clock signal and to distribute a resonant clock signal based on the clock signal to the clock network. The phase determiner may be configured to receive the clock signal and the resonant clock signal and to determine whether the clock signal and the resonant clock signal have a predetermined phase difference. When the clock signal and the resonant clock signal do not have the predetermined phase difference, the phase determiner may be configured to tune at least one of the capacitive circuit or the inductive circuit.

Claims

1. A tunable clock distribution system comprising:

a clock network comprising an inductive circuit and a capacitive circuit, at least one of the capacitive circuit or the inductive circuit being tunable;

a driving circuit configured to receive a clock signal and to distribute a resonant clock signal based on the clock signal to the clock network; and

a phase determiner configured to receive the clock signal and the resonant clock signal and to determine whether the clock signal and the resonant clock signal have a predetermined phase difference, and when the clock signal and the resonant clock signal do not have the predetermined phase difference, the phase determiner is configured to tune at least one of the capacitive circuit or the inductive circuit.

2. The tunable clock distribution system of claim 1, wherein the capacitive circuit comprises a variable capacitor while the inductance of the inductance circuit is fixed.

3. The tunable clock distribution system of claim 1, wherein the inductive circuit further comprises a variable inductor while the capacitance of the capacitive circuit is fixed.

4. The tunable clock distribution system of claim 1, wherein the at least one of the capacitive circuit or the inductive circuit is tuned using digital tuning.

5. The tunable clock distribution system of claim 4, wherein the phase detector comprises a plurality of flip-flops and a charge pump.

6. The tunable clock distribution system of claim 4, wherein the phase detector comprises a plurality of AND gates, a first delay clock signal, and a second delay clock signal.

7. The tunable clock distribution system of claim 1, wherein the predetermined phase difference is one of 0°

or 180°

.

8. The tunable clock distribution system of claim 1, wherein the capacitive circuit comprises a plurality of capacitors connected via a series of switches, a varactor, or a transistor.

9. An integrated circuit comprising:

a clock generator configured to generate a clock signal;

a driving circuit configured to distribute the clock signal;

a clock network comprising an inductive circuit and a capacitive circuit connected to the driving circuit, at least one of the capacitive circuit or the inductive circuit being tunable; and

a phase determiner configured to receive the clock signal from the clock generator and a resonant clock signal from the clock network, the phase determiner configured to determine whether the clock signal and the resonant clock signal have a predetermined phase difference, and when the clock signal and the resonant clock signal do not have the predetermined phase difference, the phase determiner is configured to tune at least one of the capacitive circuit or the inductive circuit.

10. The integrated circuit of claim 9, wherein the capacitive circuit comprises a variable capacitor while the inductance of the inductive circuit is fixed.

11. The integrated circuit of claim 9, wherein the inductive circuit further comprises a variable inductor while the capacitance of the capacitive circuit is fixed.

12. The integrated circuit of claim 9, wherein the determiner comprises a phase detector and a low-pass filter.

13. The integrated circuit of claim 12, wherein the phase detector comprises a plurality of flip-flops and a charge pump.

14. The integrated circuit of claim 12, wherein the phase detector comprises a plurality of AND gates, a first delay clock signal, and a second delay clock signal.

15. The integrated circuit of claim 12, wherein the predetermined phase difference is one of 0°

or 180°

.

16. The integrated circuit of claim 9, wherein the at least one of the capacitive circuit or the inductive circuit is tuned using digital tuning.

17. A method for tuning a resonant clock distribution network, the method comprising:

receiving a clock signal;

distributing the clock signal to a clock network that includes an inductive circuit and a capacitive circuit, at least one of the capacitive circuit or the inductive circuit being tunable;

comparing a phase of the clock signal to a phase of a resonant clock signal of the clock network;

determining whether a predetermined phase shift exists between the clock signal and the resonant clock signal; and

tuning at least one of the capacitive circuit or the inductive circuit when it is determined that the predetermined phase shift does not exist between the clock signal and the resonant clock signal.

18. The method of claim 17, wherein the capacitive circuit comprises a variable capacitor while the inductance of the inductive control circuit is fixed, wherein tuning the at least one of the capacitive circuit and the inductive circuit comprises adjusting the capacitance of the variable capacitor.

19. The method of claim 18, wherein adjusting the capacitance of the variable capacitor comprises adjusting a voltage at the variable capacitor.

20. The method of claim 17, wherein the inductive circuit comprises a variable inductor while the capacitance of the capacitive control circuit is fixed, wherein tuning the at least one of the capacitive circuit and the inductive circuit comprises adjusting the inductance of the variable inductor.