CUBESAT SYSTEM, METHOD AND APPARATUS

• US 20140039729A1
• Filed: 08/06/2012
• Published: 02/06/2014
• Est. Priority Date: 08/06/2012
• Status: Active Grant

• Current Assignee: Cal Poly Corporation
• Original Assignee: Cal Poly Corporation
• Inventors: Puig-Suari, Jordi, Williams, Austin
• Granted Patent: US 9,150,313 B2
• Time in Patent Office: Days
• US Class Current: 701/3
• CPC Class Codes: B64G 1/10 Artificial satellites; Systems of such satellites; Interplanetary vehicles space shuttles B64G1/14
• CPC Class Codes: B64G 1/223 Modular spacecraft systems
• CPC Class Codes: B64G 1/32 using earth's magnetic field
• CPC Class Codes: B64G 1/363 using sun sensors
• CPC Class Codes: B64G 1/366 using magnetometers
• CPC Class Codes: B64G 1/369 using gyroscopes as attitude sensors
• CPC Class Codes: B64G 1/428 Power distribution and management
• CPC Class Codes: B64G 1/546 shielding electronic equipment
• CPC Class Codes: B64G 1/66 Arrangements or adaptations of apparatus or instruments, not otherwise provided for
• CPC Class Codes: G06F 9/4406 Loading of operating system

Abstract

A satellite system includes a chassis, an avionics package included within an upper portion of the chassis. The avionics package includes a main system board, a payload interface board, at least one daughter board and a battery board. The main system board, the payload interface board, the at least one daughter board, and the battery board reside in substantially parallel planes. The payload interface board, the at least one daughter board, and the battery board are coupled to the main system board through one or more stackable connectors. A method of operating a satellite is also described.

Claims

1. A satellite system comprising:

a chassis;

an avionics package included within an upper portion of the chassis, the avionics package including;

a main system board;

a payload interface board;

at least one daughter board; and

a battery board, the main system board, the payload interface board, the at least one daughter board, and the battery board residing in substantially parallel planes and wherein the payload interface board, the at least one daughter board, and the battery board are coupled to the main system board through one or more of a plurality of stackable connectors.

2. The system of claim 1, wherein the main system board includes a long duration timer having a selectable time interval of between about one day and about 12 months and wherein the long duration timer is configured to interrupt power to at least a portion of the satellite when the long duration timer counts down to zero.

3. The system of claim 1, wherein the main system board includes a processor coupled to a non-volatile phase change memory system and a volatile memory system.

4. The system of claim 3, wherein the non-volatile phase change memory system includes an image of an operating system stored therein in a computer readable media.

5. The system of claim 4, wherein the processor includes:

logic stored in a computer readable media for retrieving the operating system image stored in the non-volatile phase change memory system;

logic stored in a computer readable media for storing the retrieved operating system image in the volatile memory system;

logic stored in a computer readable media for calculating a checksum value of the operating system image stored in the volatile memory system and comparing the calculated the checksum value with a known value;

logic stored in a computer readable media for initiating a hard reboot if the calculated the checksum value is not equal to the known value; and

logic stored in a computer readable media for initiating booting the operating system from the volatile memory system if the calculated the checksum value is equal to the known value.

6. The system of claim 1, wherein the main system board includes a removable umbilical system coupled to the main system board by an umbilical connector, the umbilical connector providing access to the operate and debug the avionics system and a payload portion of the satellite.

7. The system of claim 6, wherein the removable umbilical includes an Ethernet port.

8. The system of claim 6, wherein the removable umbilical includes a breakout of each one of a plurality of data lines, a plurality of control lines, a plurality of voltage rails in the avionics package and the payload portion of the satellite.

9. The system of claim 6, wherein the removable umbilical includes rewrite access to the phase change non-volatile memory in the main system board.

10. The system of claim 1, wherein the main system board includes:

a power ground selectively coupled to a first plurality of avionics package components through a first low side switch; and

a solar ground coupled to a battery ground during flight through a second low side switch.

11. A method of resetting a satellite comprising:

selecting an interval for a long duration timer of between about one day and about 12 months;

allowing the long duration timer to count down to zero;

interrupting power to at least a portion of the satellite; and

rebooting the at least a portion of the satellite.

12. The method of claim 11, wherein interrupting power to at least the portion of the satellite includes interrupting a battery ground to at least the portion of the satellite.

13. The method of claim 11, wherein interrupting power to at least the portion of the satellite includes interrupting power to at least the portion of the satellite for less than about 1.0 seconds.

14. A method of rebooting a satellite comprising:

retrieving an operating system image stored in a non-volatile phase change memory system;

storing the retrieved operating system image in the volatile memory system;

calculating a checksum value of the operating system image stored in the volatile memory system;

comparing the calculated the checksum value with a known value;

initiating a hard reboot if the calculated the checksum value is not equal to the known value; and

booting the operating system from the volatile memory system if the calculated the checksum value is equal to the known value.