STORAGE SYSTEM EMPLOYING MRAM AND ARRAY OF SOLID STATE DISKS WITH INTEGRATED SWITCH

• US 20140047166A1
• Filed: 03/15/2013
• Published: 02/13/2014
• Est. Priority Date: 08/08/2012
• Status: Active Grant

• Current Assignee: Avalanche Technology Incorporated
• Original Assignee: Avalanche Technology Incorporated
• Inventors: Asnaashari, Mehdi, Nemazie, Siamack, Mandapuram, Anilkumar
• Granted Patent: US 10,037,272 B2
• Time in Patent Office: Days
• US Class Current: 711/103
• CPC Class Codes: G06F 12/0246 in block erasable memory, e.g. flash memory
• CPC Class Codes: G06F 2212/7201 Logical to physical mapping or translation of blocks or pages
• CPC Class Codes: G06F 2212/7207 management of metadata or control data

Abstract

A storage system includes a central processing unit (CPU) subsystem including a CPU, a physically-addressed solid state disk (SSD) that is addressable using physical addresses associated with user data, provided by the CPU, to be stored in or retrieved from the physically-addressed SSD in blocks. Further, the storage system includes a non-volatile memory module, the non-volatile memory module having flash tables used to manage blocks in the physically addressed SSD, the flash tables include tables used to map logical to physical blocks for identifying the location of stored data in the physically addressed SSD. Additionally, the storage system includes a peripheral component interconnect express (PCIe) switch coupled to the CPU subsystem and a network interface controller coupled through a PCIe bus to the PCIe switch, wherein the flash tables are maintained in the non-volatile memory modules thereby avoiding reconstruction of the flash tables upon power interruption.

Claims

1. A storage system comprising:

a central processing unit (CPU) subsystem including a CPU;

a physically-addressed solid state disk (SSD) that is addressable using physical addresses associated with user data and provided by the CPU, to be stored in or retrieved from the physically-addressed SSD in blocks;

a non-volatile memory module coupled to the CPU subsystem and including flash tables used to manage blocks in the physically addressed SSD, the flash tables including tables used to map logical to physical blocks for identifying the location of stored data in the physically addressed SSD;

a peripheral component interconnect express (PCIe) switch coupled to the CPU subsystem; and

a network interface controller coupled through a PCIe bus to the PCIe switch,

wherein the flash tables are maintained in the non-volatile memory modules.

2. The storage system, as recited in claim 1, wherein the physically-addressed SSD includes a flash subsystem made of flash NAND memory.

3. The storage system, as recited in claim 1, wherein the physically-addressed SSD is coupled through a PCIe switch to the CPU subsystem.

4. The storage system, as recited in claim 1, wherein the non-volatile memory module includes MRAM.

5. The storage system, as recited in claim 1, wherein the non-volatile memory module includes STTMRAM.

6. The storage system, as recited in claim 1, wherein the non-volatile memory is coupled to the CPU subsystem.

7. The storage system, as recited in claim 6, wherein the non-volatile memory module is coupled to the CPU subsystem through a NV memory channel.

8. The storage system, as recited in claim 7, wherein the NV memory channel is a DRAM memory channel.

9. The storage system, as recited in claim 1, further including a system memory coupled to the CPU subsystem and configured to store software driver for managing the flash tables.

10. The storage system, as recited in claim 1, wherein the non-volatile memory module is configured to store a cache for caching the user data.

11. The storage system, as recited in claim 1, wherein the non-volatile memory module configured to store a journal for logging changes before committing the changes.

12. The storage system, as recited in claim 1, further including a network switch coupled to the network interface controller.

13. The storage system, as recited in claim 1, wherein the non-volatile memory is coupled to the CPU subsystem through the PCIe switch.

14. A storage system comprising:

a central processing unit (CPU) subsystem including a CPU;

a physically-addressed solid state disk (SSD) that is addressable using physical addresses associated with user data, provided by the CPU, to be stored in or retrieved from the physically-addressed SSD in blocks;

a non-volatile memory module coupled to the CPU subsystem including flash tables used to manage blocks in the physically addressed SSD, the flash tables including tables used to map logical to physical blocks for identifying the location of stored data in the physically addressed SSD; and

a peripheral component interconnect express (PCIe) switch coupled to the CPU subsystem;

wherein the flash tables are maintained in the non-volatile memory modules.

15. The storage system, as recited in claim 14, wherein the CPU subsystem includes a PCIe controller and a plurality of hosts are coupled to the PCIe controller.

16. The storage system, as recited in claim 14, wherein the CPU subsystem includes a PCIe controller and a plurality of hosts are coupled to the PCIe controller through the PCIe switch.

17. The storage system, as recited in claim 14, wherein the CPU subsystem includes a PCIe controller, the non-volatile memory being coupled to the PCIe controller.

18. The storage system, as recited in claim 17, wherein the non-volatile memory is coupled to the PCIe controller through the PCIe switch.

19. The storage system, as recited in claim 14, wherein the physically-addressed SSD includes a flash subsystem made of flash NAND memory.

20. The storage system, as recited in claim 14, wherein the physically-addressed SSD is coupled through a PCIe switch to the CPU subsystem.

21. The storage system, as recited in claim 14, wherein the non-volatile memory module includes MRAM.

22. The storage system, as recited in claim 14, wherein the non-volatile memory module includes STTMRAM.

23. The storage system, as recited in claim 22, wherein the non-volatile memory module is coupled to the CPU subsystem through a NV memory channel.

24. The storage system, as recited in claim 23, wherein the NV memory channel is a DRAM memory channel.

25. The storage system, as recited in claim 14, further including a system memory coupled to the CPU subsystem and configured to store software driver for managing the flash tables.

26. The storage system, as recited in claim 14, wherein the non-volatile memory module is configured to store a cache for caching the user data.

27. The storage system, as recited in claim 14, wherein the non-volatile memory module configured to store a journal for logging changes before committing the changes.

28. The storage system, as recited in claim 15, wherein the physically-addressed SSD is coupled to the CPU subsystem through the PCIe switch and the non-volatile memory module is coupled to the CPU subsystem.

29. The storage system, as recited in claim 16, wherein the physically-addressed SSD is coupled to the CPU subsystem through the PCIe switch and the non-volatile memory module is coupled to the CPU subsystem.

30. A storage system comprising:

a central processing unit (CPU) subsystem including a CPU;

a physically-addressed solid state disk (SSD) that is addressable using physical addresses associated with user data, provided by the CPU, to be stored in or retrieved from the physically-addressed SSD in blocks;

a non-volatile memory module including flash tables used to manage blocks in the physically addressed SSD, the flash tables including tables used to map logical to physical blocks for identifying the location of stored data in the physically addressed SSD; and

a peripheral component interconnect express (PCIe) switch coupled to the CPU subsystem and the non-volatile memory module;

wherein the flash tables are maintained in the non-volatile memory modules.