SECURITY DEVICE AND INTEGRATED CIRCUIT INCLUDING THE SAME

• US 20140049359A1
• Filed: 08/12/2013
• Published: 02/20/2014
• Est. Priority Date: 08/14/2012
• Status: Abandoned Application

• Current Assignee: Samsung Electronics Co. Ltd.
• Original Assignee: Samsung Electronics Co. Ltd.
• Inventors: RIOU, Sebastien
• Application Number:
  US13/964,325
• Publication Number:
  US 20140049359A1
• Time in Patent Office: Days
• US Class Current: 340/5.2
• CPC Class Codes: G06F 21/70 Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
• CPC Class Codes: G06F 21/87 by means of encapsulation, e.g. for integrated circuits

Abstract

A security device includes a shield having at least one first and second conductive wire, first and second logic units, and a detecting unit. The first logic unit is configured to receive a first pattern signal, transmit data based on the first pattern signal through the at least one first conducting wire, and output a detection pattern signal based on data received through the at least one second conducting wire. The second logic unit is configured to perform a logical operation on the data received through the at least one first conducting wire, and transmit a result of the logical operation through the at least one second conducting wire. The detecting unit is configured to provide the first pattern signal to the first logic unit, receive the detection pattern signal from the first logic unit, and detect an unauthorized access attempt.

Claims

1. A security device, comprising:

a shield comprising at least one first conducting wire and at least one second conducting wire;

a first logic unit configured to receive a first pattern signal, transmit data based on the first pattern signal through the at least one first conducting wire, and output a detection pattern signal based on data received through the at least one second conducting wire;

a second logic unit configured to perform a logical operation on the data received through the at least one first conducting wire and transmit a result of the logical operation through the at least one second conducting wire; and

a detecting unit configured to provide the first pattern signal to the first logic unit, receive the detection pattern signal from the first logic unit, and detect an unauthorized access attempt.

2. The security device of claim 1, wherein the detecting unit is configured to provide a second pattern signal to the second logic unit, and

wherein the second logic unit is configured to transmit a result of a logical operation performed on the data received through the at least one first conducting wire and the second pattern signal through the at least one second conducting wire.

3. The security device of claim 1, wherein the security device is disposed on a plurality of layers,

wherein the shield and the first and second logic units are disposed on a top layer from among the plurality of layers, and

wherein the detecting unit is disposed on a lower layer from among the plurality of layers.

4. The security device of claim 1, wherein the at least one first conducting wire is one of a plurality of first conducting wires, the at least one second conducting wire is one of a plurality of second conducting wires, and the shield comprises the plurality of first conducting wires and the plurality of second conducting wires,

wherein the first logic unit is configured to shift data received through the plurality of second conducting wires and transmit the shifted data through the plurality of first conducting wires, and

wherein the detecting unit is configured to control a shift operation of the first logic unit.

5. The security device of claim 4, wherein the first logic unit comprises a plurality of flip-flops or latches, and

wherein an output terminal of each of the flip-flops or latches is connected to one of the plurality of first conducting wires.

6. The security device of claim 4, wherein the detecting unit is configured to control the first logic unit to irregularly perform a shift operation.

7. The security device of claim 4, wherein the first logic unit comprises a plurality of switches respectively connected to the plurality of first conducting wires, and

wherein the detecting unit is configured to control the plurality of switches and disable transmission of data through the plurality of first conducting wires.

8. The security device of claim 4, wherein the first logic unit comprises a plurality of combinational logic circuits configured to perform a logical operation on the data received through the plurality of second conducting wires, and transmit an output of the logical operation through at least one of the plurality of first conducting wires.

9. The security device of claim 1, wherein the detecting unit comprises:

a pattern generating unit configured to generate at least one pattern signal;

a control unit configured to control the pattern generating unit and generate an expectation pattern signal based on the at least one pattern signal; and

a comparator configured to receive the detection pattern signal and the expectation pattern signal and compare the detection pattern signal and the expectation pattern signal with each other.

10. The security device of claim 9, wherein the pattern generating unit comprises a random number generator configured to generate a random number in response to a control signal received from the control unit.

11. The security device of claim 10, wherein the random number generator comprises a pseudo random number generator configured to generate each of all possibly generable numbers at least once during a single period.

12. The security device of claim 1, wherein the security device is configured to detect an unauthorized attempt to access an integrated circuit comprising a smart card, and

wherein the shield is disposed on an top layer of the integrated circuit.

13. An integrated circuit comprising a plurality of layers, comprising:

a shield disposed on a first layer from among the plurality of layers and comprising at least one first conducting wire and at least one second conducting wire;

a first logic unit disposed on the first layer and configured to receive a first pattern signal, transmit data based on the first pattern signal through the at least one first conducting wire, and output a detection pattern signal based on data received through the at least one second conducting wire;

a second logic unit disposed on the first layer and configured to perform a logical operation on the data received through the at least one first conducting wire, and transmit a result of the logical operation through the at least one second conducting wire;

a secure circuit unit disposed on a second layer disposed below the first layer; and

a detecting unit disposed on the second layer and configured to provide the first pattern signal to the first logic unit, receive the detection pattern signal from the first logic unit, and detect an unauthorized access attempt.

14. The integrated circuit of claim 13, wherein the at least one first conducting wire is one of a plurality of first conducting wires, the at least one second conducting wire is one of a plurality of second conducting wires, and the shield comprises the plurality of first conducting wires and the plurality of second conducting wires,

wherein the first logic unit is configured to shift data received through the plurality of second conducting wires and transmit the shifted data through the plurality of first conducting wires, and

wherein the detecting unit is configured to control a shift operation of the first logic unit.

15. The integrated circuit of claim 13, wherein the secure circuit unit comprises a non-volatile memory and a non-volatile memory management unit, and

wherein the non-volatile memory management unit is configured to change data stored in the non-volatile memory in response to a signal received from the detecting unit.

16. A security device, comprising:

a logic circuit disposed on a top layer of an integrated circuit, and configured to output a detection pattern signal;

a secure circuit disposed on a lower layer of the integrated circuit; and

a detecting unit disposed on the lower layer, and-configured to receive the detection pattern signal from the logic circuit, provide a pattern signal and a control signal to the logic circuit, and provide an error signal to the secure circuit indicating an unauthorized access attempt based on a comparison of the detection pattern signal and an expectation pattern signal.

17. The security device of claim 16, wherein the logic circuit comprises a first logic unit and a second logic unit operatively coupled to the first logic unit.

18. The security device of claim 17, wherein the first logic unit comprises a plurality of flip-flops or latches.

19. The security device of claim 17, wherein the detecting unit comprises:

a pattern generating unit configured to generate the pattern signal;

a control unit configured to control the pattern generating unit and generate the expectation pattern signal based on the pattern signal; and

a comparator configured to receive the detection pattern signal and the expectation pattern signal and compare the detection pattern signal and the expectation pattern signal with each other.

20. The security device of claim 17, wherein the detecting unit is configured to control the first logic unit to irregularly perform a shift operation.