MEMORY ADDRESS TRANSLATION METHOD FOR FLASH STORAGE SYSTEM
First Claim
1. A memory address translation method for flash storage system, which the flash memory storage system has a RAM including a level-one mapping and a flash memory including a level-two mapping table, the steps comprising:
- saving at least one first entry with two information in the level-one mapping table storing in the RAM, one information of the first entry is a validation of the first entry, and the other information of the first entry is a location of level-two mapping; and
saving at least one second entry with two information in the level-two mapping table storing in the flash memory, one information of the second entry is a validation of the second entry, and the other information of the second entry is a physical location of data in flash memory.
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Abstract
A memory address translation method for flash storage system is disclosed. There are two level mapping tables to reduce overhead of mapping table management. In level-one mapping table, each entry contains two kinds of information, which one is the validation of this entry, called Valid Mark and the other is the location of level-two mapping. The level-one mapping table is always located on RAM, and never saved into flash memory. In level-two mapping table, each entry contains two kinds of information, which one is the validation of this entry and the other is the physical location of data in flash memory. The physical addresses of both data and level-two mapping table are dynamically determined. Level-two mapping table is loaded to RAM when it is needed to reference, and is saved into flash memory periodically if the content is updated.
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Citations
6 Claims
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1. A memory address translation method for flash storage system, which the flash memory storage system has a RAM including a level-one mapping and a flash memory including a level-two mapping table, the steps comprising:
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saving at least one first entry with two information in the level-one mapping table storing in the RAM, one information of the first entry is a validation of the first entry, and the other information of the first entry is a location of level-two mapping; and saving at least one second entry with two information in the level-two mapping table storing in the flash memory, one information of the second entry is a validation of the second entry, and the other information of the second entry is a physical location of data in flash memory. - View Dependent Claims (2, 3, 4, 5, 6)
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Specification