ALIGNED GATE-ALL-AROUND STRUCTURE
First Claim
1. A semiconductor device, comprising:
- a gate;
a semiconductor layer disposed between a substrate, upon which the semiconductor device is formed, and at least one of;
at least some of a first channel of the semiconductor device;
at least some of a source region of the semiconductor device;
orat least some of a drain region of the semiconductor device;
a dielectric layer disposed between the substrate and at least one of;
at least some of the first channel;
at least some of the source region;
orat least some of the drain region;
a first gate portion of the gate disposed above the first channel; and
a second gate portion of the gate disposed between the substrate and the first channel and aligned with the first gate portion.
1 Assignment
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Accused Products
Abstract
Among other things, a semiconductor device comprising an aligned gate and a method for forming the semiconductor device are provided. The semiconductor device comprises a gate formed according to a multi-gate structure, such as a gate-all-around structure. A first gate portion of the gate is formed above a first channel of the semiconductor device. A second gate portion of the gate is formed below the first channel, and is aligned with the first gate portion. In an example of forming the gate, a cavity is etched within a semiconductor layer formed above a substrate. A dielectric layer is formed around at least some of the cavity to define a region of the cavity within which the second gate portion is to be formed in a self-aligned manner with the first gate portion. In this way, the semiconductor device comprises a first gate portion aligned with a second gate portion.
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Citations
20 Claims
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1. A semiconductor device, comprising:
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a gate; a semiconductor layer disposed between a substrate, upon which the semiconductor device is formed, and at least one of; at least some of a first channel of the semiconductor device; at least some of a source region of the semiconductor device;
orat least some of a drain region of the semiconductor device; a dielectric layer disposed between the substrate and at least one of; at least some of the first channel; at least some of the source region;
orat least some of the drain region; a first gate portion of the gate disposed above the first channel; and a second gate portion of the gate disposed between the substrate and the first channel and aligned with the first gate portion. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
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11. A semiconductor device, comprising:
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a gate-all-around structure; a semiconductor layer disposed between a first channel of the semiconductor device and a substrate upon which the semiconductor device is formed; a dielectric layer disposed between the semiconductor layer and the first channel, the dielectric layer comprising an oxidized portion of the semiconductor layer; a second gate portion of the gate-all-round structure disposed between the dielectric layer and the first channel and aligned with a first gate portion of the gate-all-around structure above the first channel; a second channel disposed between the second gate portion of the gate-all-round structure and the dielectric layer; and a third gate portion of the gate-all-round structure disposed between the second channel and the dielectric layer, the third gate portion aligned with the first gate portion and the second gate portion of the gate-all-around structure. - View Dependent Claims (12, 14, 15)
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16. A method for fabricating a semiconductor device, comprising:
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forming a semiconductor layer between a first channel of the semiconductor device and a substrate upon which the semiconductor device is formed; forming a cavity within the semiconductor layer between the first channel and the substrate; exposing the semiconductor layer to oxygen to form a dielectric layer around at least some of the cavity, the dielectric layer extending under at least one of; at least some of the first channel of the semiconductor device; at least some of a source region of the semiconductor device;
orat least some of a drain region of the semiconductor device; and forming a second gate portion of a gate of the semiconductor device within at least some of the cavity, the second gate portion disposed between the substrate and the first channel, the second gate portion aligned with a first gate portion of the gate above the first channel. - View Dependent Claims (13, 17, 18, 19, 20)
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Specification