Solid State Lightening Driver with Mixed Control of Power Switch

• US 20140055052A1
• Filed: 01/23/2013
• Published: 02/27/2014
• Est. Priority Date: 08/24/2012
• Status: Active Grant

• Current Assignee: Dialog Semiconductor GmbH (Renesas Electronics Corporation)
• Original Assignee: Dialog Semiconductor GmbH (Renesas Electronics Corporation)
• Inventors: Zudrell-Koch, Stefan, Jelaca, Nebojsa
• Granted Patent: US 9,173,273 B2
• Time in Patent Office: Days
• US Class Current: 315/200.R
• CPC Class Codes: H05B 41/34 to provide a sequence of flashes
• CPC Class Codes: H05B 45/31 Phase-control circuits
• CPC Class Codes: H05B 45/325 Pulse-width modulation [PWM]
• CPC Class Codes: H05B 45/345 Current stabilisation; Maintaining constant current
• CPC Class Codes: H05B 45/36 Circuits for reducing or suppressing harmonics, ripples or electromagnetic interferences [EMI]
• CPC Class Codes: H05B 45/3725 Switched mode power supply [SMPS]
• CPC Class Codes: H05B 45/375 using buck topology
• CPC Class Codes: H05B 45/385 using flyback topology
• CPC Class Codes: H05B 47/10 Controlling the light source

Abstract

In order to control of dimming of solid state lighting devices (SSL) a driver circuit drives the SSL subject to an input voltage using a phase-cut dimmer. The driver circuit comprises a transistor operable in two modes, either alternating between on/off states or continuously controlling a current through the transistor. A power converter network provides a switched-mode power converter in conjunction with the transistor when operated in the first mode generating a drive voltage for the SSL. The control unit controls the transistor to selectively operate in one of the two modes; to control the transistor to determine that the input voltage exceeds an input voltage threshold; and to control a drive current through the SSL based on a measurement of a phase-cut angle thereby controlling an illumination level of the SSL device.

Claims

1. A control unit for a driver circuit which is configured to drive a solid state lightening, referred to as SSL device, subject to an input voltage derived from a mains voltage using a phase-cut dimmer, wherein the driver circuit comprises a transistor operable in a first mode and in a second mode;

and a power converter network; and

wherein the control unit is configured to

control the transistor to selectively operate in the first and second mode;

wherein in the first mode, the transistor alternates between an on-state and an off-state at a commutation cycle rate, thereby providing a switched-mode power converter in conjunction with the power converter network;

wherein in the second mode, the transistor is controlled so that it is traversed by a controlled current, thereby providing a controlled load to the mains voltage.

2. The control unit of claim 1, wherein the control unit is configured to

control the transistor to change from the first mode to the second mode at a first time instant;

determine that the input voltage exceeds a pre-determined input voltage threshold at a second time instant, subsequent to the first time instant; and

control a drive current through the SSL device based on the first and second time instants, thereby controlling an illumination level of the SSL device.

3. The control unit of claim 2, wherein

the driver circuit further comprises current sensing means configured to determine a feedback signal indicative of the level of the current through the transistor;

and

the control unit is configured to control the level of the current through the transistor, when in the second mode, based on the feedback signal.

4. The control unit of claim 2, wherein the control unit is configured to receive a voltage derived from the input voltage;

and wherein the control unit is configured to determine that the input voltage exceeds a pre-determined input voltage threshold by determining that the received voltage exceeds a pre-determined threshold.

5. The control unit of claim 2, wherein the control unit is configured to

determine an indicator of a phase-cut angle set by the dimmer based on the time interval between the first and second time instants;

determine the illumination level corresponding to the phase-cut angle; and

control the drive current providing the illumination level.

6. The control unit of claim 2, wherein

the mains voltage is an alternating voltage at a mains frequency;

the control unit is configured to synchronize with the mains voltage;

the phase-cut dimmer is a leading edge phase-cut dimmer; and

the first time instant corresponds to a zero-crossing of the mains voltage.

7. The control unit of claim 2, wherein

during a startup phase, the control unit is configured to operate the transistor in the second mode for at least two half-waves of the mains voltage;

the control unit is configured to determine a time interval during which the input voltage is below the pre-determined input voltage threshold; and

an edge of the time interval corresponds to a zero-crossing of the mains voltage.

8. The control unit of claim 1, wherein

the mains voltage is an alternating voltage at a mains frequency;

the control unit is configured to periodically put the transistor in the second mode at a measurement frequency; and

the measurement frequency is smaller than the mains frequency.

9. The control unit of claim 1, wherein the control unit is configured to control the commutation cycle rate and/or a duty cycle of the transistor, when in the first mode.

10. The control unit of claim 2, wherein the control unit is configured to store data derived from the first and/or second time instants.

11. A driver circuit for driving a solid state lightening, referred to as SSL, device, subject to an input voltage derived from a mains voltage using a phase-cut dimmer, the driver circuit comprising

a transistor operable in a first mode and in a second mode;

wherein in the first mode, the transistor alternates between an on-state and an off-state at a commutation cycle rate;

wherein in the second mode, the transistor is traversed by a current at a smoothly controllable level;

a power converter network configured to provide a switched-mode power converter in conjunction with the transistor when operated in the first mode;

wherein the power converter generates a drive voltage for the SSL device from the input voltage; and

a control unit configured to control the transistor to selectively operate in the first and second mode;

wherein in the first mode, the transistor alternates between an on-state and an off-state at a commutation cycle rate, thereby providing a switched-mode power converter in conjunction with the power converter network;

wherein in the second mode, the transistor is controlled so that it is traversed by a controlled current, thereby providing a controlled load to the mains voltage.

12. The driver circuit of claim 11, wherein

the power converter network comprises a flyback network, a buck network and/or a SEPIC network;

and/or

the drive voltage provided by the power converter is maintained at least at an on-voltage of the SSL device.

13. The driver circuit of claim 11, further comprising a current source arranged in series to the SSL device and configured to provide a drive current for the SSL device subject to the control of the control unit.

14. The driver circuit of claim 11, further comprising

a rectifier unit configured to rectify the input voltage;

input voltage sensing means configured to sense a voltage derived from the input voltage and configured to provide the sensed voltage to the control unit; and

a stabilizing capacitor configured to stabilize the rectified input voltage to yield a voltage at an input of the power converter network.

15. The driver circuit of claim 11, wherein the control unit is configured to

control the transistor to change from the first mode to the second mode at a first time instant;

determine that the input voltage exceeds a pre-determined input voltage threshold at a second time instant, subsequent to the first time instant; and

control a drive current through the SSL device based on the first and second time instants, thereby controlling an illumination level of the SSL device.

16. The driver circuit of claim 15 wherein

the driver circuit further comprises current sensing means configured to determine a feedback signal indicative of the level of the current through the transistor;

and

the control unit is configured to control the level of the current through the transistor, when in the second mode, based on the feedback signal.

17. The driver circuit of claim 15, wherein the control unit is configured to receive a voltage derived from the input voltage;

and wherein the control unit is configured to determine that the input voltage exceeds a pre-determined input voltage threshold by determining that the received voltage exceeds a pre-determined threshold.

18. The driver circuit of claim 15, wherein the control unit is configured to

determine an indicator of a phase-cut angle set by the dimmer based on the time interval between the first and second time instants;

determine the illumination level corresponding to the phase-cut angle; and

control the drive current providing the illumination level.

19. The driver circuit of claim 15, wherein

the mains voltage is an alternating voltage at a mains frequency;

the control unit is configured to synchronize with the mains voltage;

the phase-cut dimmer is a leading edge phase-cut dimmer; and

the first time instant corresponds to a zero-crossing of the mains voltage.

20. The driver circuit of claim 15, wherein

during a startup phase, the control unit is configured to operate the transistor in the second mode for at least two half-waves of the mains voltage;

the control unit is configured to determine a time interval during which the input voltage is below the pre-determined input voltage threshold; and

an edge of the time interval corresponds to a zero-crossing of the mains voltage.

21. The driver circuit of claim 11, wherein

the mains voltage is an alternating voltage at a mains frequency;

the control unit is configured to periodically put the transistor in the second mode at a measurement frequency; and

the measurement frequency is smaller than the mains frequency.

22. The driver circuit of claim 11, wherein the control unit is configured to control the commutation cycle rate and/or a duty cycle of the transistor, when in the first mode.

23. The driver circuit of claim 15, wherein the control unit is configured to store data derived from the first and/or second time instants.

24. A light bulb assembly comprising

an electrical connection module configured to electrically connect to a mains voltage submitted to a phase-cut dimmer, thereby providing an input voltage;

a driver circuit configured to provide a drive voltage and a drive current in accordance to a setting of the phase-cut dimmer, based on the input voltage the driver circuit comprising

a transistor operable in a first mode and in a second mode;

wherein in the first mode, the transistor alternates between an on-state and an off-state at a commutation cycle rate;

wherein in the second mode, the transistor is traversed by a current at a smoothly controllable level;

a power converter network configured to provide a switched-mode power converter in conjunction with the transistor when operated in the first mode;

wherein the power converter generates a drive voltage for the SSL device from the input voltage; and

a control unit wherein the control unit is configured to control the transistor to selectively operate in the first and second mode;

wherein in the first mode, the transistor alternates between an on-state and an off-state at a commutation cycle rate, thereby providing a switched-mode power converter in conjunction with the power converter network;

wherein in the second mode, the transistor is controlled so that it is traversed by a controlled current, thereby providing a controlled load to the mains voltage; and

a SSL device configured to provide light at an illumination level in accordance to the drive voltage and drive current.

25. The light bulb assembly of claim 24, wherein the power converter network comprises a flyback network, a buck network and/or a SEPIC network, and/or the drive voltage provided by the power converter is maintained at least at an on-voltage of the SSL device.

26. The light bulb assembly of claim 24 wherein the driver circuit further comprises a current source arranged in series to the SSL device and configured to provide a drive current for the SSL device subject to the control of the control unit.

27. The light bulb assembly of claim 24, wherein the control unit is configured to

control the transistor to change from the first mode to the second mode at a first time instant;

determine that the input voltage exceeds a pre-determined input voltage threshold at a second time instant, subsequent to the first time instant; and

Control a drive current through the SSL device based on the first and second time instants, thereby controlling an illumination level of the SSL device.

28. The light bulb assembly of claim 24, wherein the control unit is configured to receive a voltage derived from the input voltage;

and wherein the control unit is configured to determine that the input voltage exceeds a pre-determined input voltage threshold by determining that the received voltage exceeds a pre-determined threshold.

29. A method to allow a reliable determination of the phase of a mains power submitted to a phase-cut dimmer, thereby reliably and efficiently controlling the illumination of a Solid State Lightening (SSL) lamp, wherein the method comprises the steps of:

(1) providing a control unit, a driver circuit comprising a single power switch, and a SSL device, wherein the driver circuit is setting an illumination level of the SSL device in accordance to a setting of the phase-cut dimmer;

(2) measuring a phase-cut-angle set by the phase-cut dimmer by using the single power switch;

(3) translating measured setting of the phase-cut dimmer into a drive voltage and a drive current driving the SSL device by using the single switch for power conversion; and

(4) sensing current through the power switch to determine a feedback signal indicative of the level of the current through the SSL in order to control the current.

30. The method of claim 29 wherein the control unit is configured to

Control the power switch to selectively operate in a first and a second mode, wherein in the first mode, the power switch alternates between an on-state and an off-state at a commutation cycle rate;

wherein in the second mode;

control the power switch so that it is traversed by a current at a continuously controllable level;

to control the power switch to change from the first mode to the second mode at a first time instant;

Determine that an input voltage exceeds a pre-determined input voltage threshold at a second time instant, subsequent to the first time instant; and

Control a drive current through the SSL device based on the first and second time instants, thereby controlling an illumination level of the SSL device.

31. The method of claim 30 wherein the phase-cut angle is determined by measuring a time interval during which the input voltage was detected to be low, wherein the measured time interval corresponds to the phase-cut angle.

32. The method of claim 31 wherein the phase-cut angle is proportional to the measured time interval.