SEMICONDUCTOR DEVICE AND BATTERY VOLTAGE MONITORING DEVICE

• US 20140055896A1
• Filed: 08/16/2013
• Published: 02/27/2014
• Est. Priority Date: 08/24/2012
• Status: Active Grant

• Current Assignee: Renesas Electronics Corporation
• Original Assignee: Renesas Electronics Corporation
• Inventors: MURAMOTO, Yoshitaka, KIMURA, Junko, HAYAKAWA, Hirohiko
• Granted Patent: US 9,735,567 B2
• Time in Patent Office: Days
• US Class Current: 361/86
• CPC Class Codes: G01R 19/16542 for batteries charge condition monitoring in G01R31/36
• CPC Class Codes: G01R 31/3835 involving only voltage measurements
• CPC Class Codes: G01R 31/396 Acquisition or processing of data for testing or for monitoring individual cells or groups of cells within a battery
• CPC Class Codes: H02H 7/18 for batteries; for accumulators
• CPC Class Codes: H02J 7/0016 using shunting, discharge or bypass circuits
• CPC Class Codes: H02J 7/0048 Detection of remaining charge capacity or state of charge [SOC]

Abstract

A semiconductor device is provided for measuring a voltage of each of plural unit cells series-coupled in multi-stage and configuring an assembled battery. The semiconductor device includes two terminals coupled to two nodes which are electrodes of a unit cell and coupled with other unit cells, and a voltage measurement circuit which measures the inter-terminal voltage between the two terminals. The device also includes a down-convert level shifter circuit which converts the inter-terminal voltage into a low-potential-side inter-terminal voltage based on a ground potential, and a comparator circuit which compares the converted low-potential-side inter-terminal voltage with a predetermined reference voltage. The semiconductor device further includes an up-convert level shifter circuit which converts a low-potential-side shunt control signal based on the ground potential into a high-potential-side shunt control signal, and a switch which short-circuits the two terminals via a resistor based on the converted high-potential-side shunt control signal.

Claims

1. A semiconductor device for measuring voltage of each of a plurality of unit cells series-coupled in multi-stage and configuring an assembled battery, the semiconductor device comprising:

a first terminal to be coupled to a first node which is one electrode of a unit cell and is coupled to another unit cell in the unit cells;

a second terminal to be coupled to a second node which is the other electrode of the unit cell and is coupled to another unit cell;

a voltage measurement circuit operable to measure an inter-terminal voltage between the first terminal and the second terminal;

a first level shifter circuit operable to convert the inter-terminal voltage into a low-potential-side inter-terminal voltage;

a comparator circuit operable to compare the low-potential-side inter-terminal voltage with a predetermined reference voltage;

a second level shifter circuit operable to convert a low-potential-side shunt control signal into a high-potential-side shunt control signal; and

a first switch operable to short-circuit the first terminal and the second terminal via a first resistor, on the basis of the high-potential-side shunt control signal.

2. The semiconductor device according to claim 1, further comprising:

a third terminal to be coupled to the first node;

a second resistor coupled between the first terminal and the third terminal;

a third level shifter circuit operable to convert a low-potential-side sense enable signal into a high-potential-side sense enable signal;

a fourth level shifter circuit operable to convert a low-potential-side cell balance enable signal into a high-potential-side cell balance enable signal; and

a third switch operable to short-circuit the third terminal and the second terminal, on the basis of the high-potential-side cell balance enable signal,

wherein the first level shifter circuit comprises;

a voltage-to-current converter circuit operable to convert the inter-terminal voltage into a current value corresponding to the inter-terminal voltage;

a current-to-voltage converter circuit operable to convert the current value into a low-potential-side inter-terminal voltage corresponding to the current value;

a second switch operable to control operation of the voltage-to-current converter circuit, on the basis of the high-potential-side sense enable signal; and

a fourth switch operable to control operation of the voltage-to-current converter circuit, on the basis of the potential of the third terminal, in parallel with the second switch.

3. The semiconductor device according to claim 1, further comprising:

a third terminal to be coupled to the first node;

a fourth terminal to be coupled to the second node;

a second resistor coupled between the first terminal and the third terminal;

a third level shifter circuit operable to convert a low-potential-side sense enable signal into a high-potential-side sense enable signal;

a fourth level shifter circuit operable to convert a low-potential-side cell balance enable signal into a high-potential-side cell balance enable signal; and

a fifth switch operable to short-circuit the third terminal and the fourth terminal, on the basis of the high-potential-side cell balance enable signal,

wherein the first level shifter circuit comprises;

a voltage-to-current converter circuit operable to convert the inter-terminal voltage into a current value corresponding to the inter-terminal voltage;

a current-to-voltage converter circuit operable to convert the current value into a low-potential-side inter-terminal voltage corresponding to the current value;

a second switch operable to control operation of the voltage-to-current converter circuit, on the basis of the high-potential-side sense enable signal; and

a fourth switch operable to control operation of the voltage-to-current converter circuit, on the basis of the potential of the third terminal, in parallel with the second switch.

4. The semiconductor device according to claim 2,

wherein the voltage-to-current converter circuit comprises:

a third resistor; and

a first high withstand voltage FET,

wherein, in the voltage-to-current converter circuit, a gate of the first high withstand voltage FET is coupled to the second terminal, the second switch and the third resistor are coupled in series between a source of the first high withstand voltage FET and the first terminal, and a conversion current of a current value corresponding to the inter-terminal voltage is outputted to a drain of the first high withstand voltage FET,

wherein the current-to-voltage converter circuit comprises;

a fourth resistor; and

a second high withstand voltage FET, and

wherein, in the current-to-voltage converter circuit, the fourth resistor is coupled in series with a diode formed between a drain and a short-circuited gate-and-source of the second high withstand voltage FET, and the current-to-voltage converter circuit converts the inputted conversion current into the low-potential-side inter-terminal voltage corresponding to the current value, and outputs the voltage.

5. The semiconductor device according to claim 4, further comprising:

a fifth terminal to be coupled to a third node which is one electrode of a unit cell different from the unit cell and is coupled to another unit cell in the unit cells,

wherein the first level shifter circuit comprises;

a third high withstand voltage FET, and

wherein, in the first level shifter circuit, a gate of the third high withstand voltage FET is coupled to the fifth terminal, and a drain and a source of the third high withstand voltage FET are inserted in a signal line which transmits the conversion current between the voltage-to-current converter circuit and the current-to-voltage converter circuit.

6. The semiconductor device according to claim 2,

wherein the voltage-to-current converter circuit comprises:

a third resistor; and

a first high withstand voltage bipolar transistor,

wherein, in the voltage-to-current converter circuit, a base of the first high withstand voltage bipolar transistor is coupled to the second terminal, the second switch and the third resistor are coupled in series between an emitter of the first high withstand voltage bipolar transistor and the first terminal, and a conversion current of a current value corresponding to the inter-terminal voltage is outputted to a collector of the first high withstand voltage bipolar transistor,

wherein the current-to-voltage converter circuit comprises;

a fourth resistor; and

a second high withstand voltage bipolar transistor, and

wherein, in the current-to-voltage converter circuit, the fourth resistor is coupled in series with a diode formed between a collector and a short-circuited base-and-emitter of the second high withstand voltage bipolar transistor, and the current-to-voltage converter circuit converts the inputted conversion current into the low-potential-side inter-terminal voltage corresponding to the current value, and outputs the voltage.

7. The semiconductor device according to claim 6, further comprising:

a fifth terminal to be coupled to a third node which is one electrode of a unit cell different from the unit cell and is coupled to another unit cell in the unit cells,

wherein the first level shifter circuit comprises;

a third high withstand voltage bipolar transistor, and

wherein, in the first level shifter circuit, a base of the third high withstand voltage bipolar transistor is coupled to the fifth terminal, and a collector and an emitter of the third high withstand voltage bipolar transistor are inserted in a signal line which transmits the conversion current between the voltage-to-current converter circuit and the current-to-voltage converter circuit.

8. The semiconductor device according to claim 1,

wherein the second level shifter circuit converts a low-potential-side control signal into a high-potential-side control signal, and

wherein the second level shifter circuit comprises:

a first current mirror operable to be supplied with a reference current and to output a first current output at a predetermined magnification of the reference current;

a first high-withstand voltage transistor operable to control the first current output on the basis of the low-potential-side control signal, and operable to output a second current output; and

a fifth resistor coupled to a high-potential-side signal line, and operable to output the high-potential-side control signal produced by a flow of the second current output.

9. The semiconductor device according to claim 1,

wherein the second level shifter circuit converts a low-potential-side control signal into a high-potential-side control signal, and comprises:

a first current mirror operable to be supplied with a reference current and to output a first current output at a predetermined magnification of the reference current;

a second high-withstand voltage transistor operable to control the first current output on the basis of the low-potential-side control signal, and operable to output a second current output; and

a second current mirror operable to be supplied with the second current output and to output a third current output at a predetermined magnification of the second current output; and

a sixth resistor operable to output the high-potential-side control signal produced by a flow of the third current output.

10. The semiconductor device according to claim 1,

wherein the second level shifter circuit converts a first low-potential-side control signal into a first high-potential-side control signal, and converts a second low-potential-side control signal into a second high-potential-side control signal of a potential lower than the first high-potential-side control signal, and

wherein the second level shifter circuit comprises:

a first current mirror operable to be supplied with a reference current and to output a first current output at a predetermined magnification of the reference current;

a first high-withstand voltage transistor operable to control the first current output on the basis of the first low-potential-side control signal, and operable to output a second current output;

a fifth resistor coupled to a high-potential-side signal line, and operable to output the first high-potential-side control signal produced by a flow of the second current output;

a second high-withstand voltage transistor operable to control the first current output on the basis of the second low-potential-side control signal, and operable to output a third current output;

a second current mirror operable to be supplied with the third current output and to output a fourth current output at a predetermined magnification of the third current output; and

a sixth resistor operable to output the second high-potential-side control signal produced by a flow of the fourth current output.

11. The semiconductor device according to claim 1,

wherein the comparator circuit comprises:

a high-voltage-side comparator circuit operable to compare the low-potential-side inter-terminal voltage with a high-voltage-side reference voltage; and

a low-voltage-side comparator circuit operable to compare the low-potential-side inter-terminal voltage with a low-voltage-side reference voltage, and

wherein the semiconductor device further comprises;

a status register operable to store comparison results of each of the high-voltage-side comparator circuit and the low-voltage-side comparator circuit.

12. The semiconductor device according to claim 2,

wherein the comparator circuit comprises:

a high-voltage-side comparator circuit operable to compare the low-potential-side inter-terminal voltage with a high-voltage-side reference voltage; and

a low-voltage-side comparator circuit operable to compare the low-potential-side inter-terminal voltage with a low-voltage-side reference voltage, and

wherein the semiconductor device further comprises;

a status register operable to store comparison results of each of the high-voltage-side comparator circuit and the low-voltage-side comparator circuit; and

a control register operable to store at least one of the low-potential-side shunt control signal, the low-potential-side sense enable signal, and the low-potential-side cell balance enable signal.

13. The semiconductor device according to claim 11, further comprising:

an interrupt generating circuit operable to generate an interrupt signal, on the basis of the comparison results of each of the high-voltage-side comparator circuit and the low-voltage-side comparator circuit.

14. A battery voltage monitoring device comprising:

a plurality of voltage measurement units provided for each group of a plurality of unit cells series-coupled in multi-stage for configuring an assembled battery; and

a battery system controller coupled to the voltage measurement units,

wherein each of the voltage measurement units is comprised of a semiconductor device, and

wherein the semiconductor device comprises;

a first terminal to be coupled to a first node which is one electrode of a unit cell and is coupled to another unit cell in the unit cells;

a second terminal to be coupled to a second node which is the other electrode of the unit cell and is coupled to another unit cell;

a voltage measurement circuit operable to measure an inter-terminal voltage between the first terminal and the second terminal;

a first level shifter circuit operable to convert the inter-terminal voltage into a low-potential-side inter-terminal voltage;

a comparator circuit operable to compare the low-potential-side inter-terminal voltage with a predetermined reference voltage;

a second level shifter circuit operable to convert a low-potential-side shunt control signal into a high-potential-side shunt control signal; and

a first switch operable to short-circuit the first terminal and the second terminal via a first resistor, on the basis of the high-potential-side shunt control signal.

15. The battery voltage monitoring device according to claim 14,

wherein the semiconductor device further comprises:

a third terminal to be coupled to the first node;

a second resistor coupled between the first terminal and the third terminal;

a third level shifter circuit operable to convert a low-potential-side sense enable signal into a high-potential-side sense enable signal;

a fourth level shifter circuit operable to convert a low-potential-side cell balance enable signal into a high-potential-side cell balance enable signal; and

a third switch operable to short-circuit the third terminal and the second terminal, on the basis of the high-potential-side cell balance enable signal,

wherein the first level shifter circuit comprises;

a voltage-to-current converter circuit operable to convert the inter-terminal voltage into a current value corresponding to the inter-terminal voltage;

a current-to-voltage converter circuit operable to convert the current value into a low-potential-side inter-terminal voltage corresponding to the current value;

a second switch operable to control operation of the voltage-to-current converter circuit, on the basis of the high-potential-side sense enable signal; and

a fourth switch operable to control operation of the voltage-to-current converter circuit, on the basis of the potential of the third terminal, in parallel with the second switch.

16. The battery voltage monitoring device according to claim 14,

wherein the semiconductor device further comprises:

a third terminal to be coupled to the first node;

a fourth terminal to be coupled to the second node;

a second resistor coupled between the first terminal and the third terminal;

a third level shifter circuit operable to convert a low-potential-side sense enable signal into a high-potential-side sense enable signal;

a fourth level shifter circuit operable to convert a low-potential-side cell balance enable signal into a high-potential-side cell balance enable signal; and

a fifth switch operable to short-circuit the third terminal and the fourth terminal, on the basis of the high-potential-side cell balance enable signal, and

wherein the first level shifter circuit comprises;

a voltage-to-current converter circuit operable to convert the inter-terminal voltage into a current value corresponding to the inter-terminal voltage;

a current-to-voltage converter circuit operable to convert the current value into a low-potential-side inter-terminal voltage corresponding to the current value;

a second switch operable to control operation of the voltage-to-current converter circuit, on the basis of the high-potential-side sense enable signal; and

a fourth switch operable to control operation of the voltage-to-current converter circuit, on the basis of the potential of the third terminal, in parallel with the second switch.

17. The battery voltage monitoring device according to claim 14,

wherein the comparator circuit comprises:

a high-voltage-side comparator circuit operable to compare the low-potential-side inter-terminal voltage with a high-voltage-side reference voltage;

a low-voltage-side comparator circuit operable to compare the low-potential-side inter-terminal voltage with a low-voltage-side reference voltage; and

a status register operable to store comparison results of each of the high-voltage-side comparator circuit and the low-voltage-side comparator circuit, and

wherein the semiconductor device included in each of the voltage measurement units is coupled to the battery system controller via a communication path, and the battery system controller is operable to access the status register via the communication path.

18. The battery voltage monitoring device according to claim 15,

wherein the comparator circuit comprises:

a high-voltage-side comparator circuit operable to compare the low-potential-side inter-terminal voltage with a high-voltage-side reference voltage;

a low-voltage-side comparator circuit operable to compare the low-potential-side inter-terminal voltage with a low-voltage-side reference voltage;

a status register operable to store comparison results of each of the high-voltage-side comparator circuit and the low-voltage-side comparator circuit; and

a control register operable to store at least one of the low-potential-side shunt control signal, the low-potential-side sense enable signal, and the low-potential-side cell balance enable signal, and

wherein the semiconductor device included in each of the voltage measurement units is coupled to the battery system controller via a communication path, and the battery system controller is operable to access the status register and the control register via the communication path.

19. The battery voltage monitoring device according to claim 17,

wherein the semiconductor device further comprises:

an interrupt generating circuit operable to generate an interrupt signal for the battery system controller, on the basis of the comparison results of each of the high-voltage-side comparator circuit and the low-voltage-side comparator circuit.