SYSTEMS AND METHODS FOR MONITORING LCD DISPLAY PANEL RESISTANCE

• US 20140062936A1
• Filed: 08/31/2012
• Published: 03/06/2014
• Est. Priority Date: 08/31/2012
• Status: Active Grant

• Current Assignee: Apple Inc.
• Original Assignee: Apple Inc.
• Inventors: Al-Dahle, Ahmad, Bi, Yafei
• Granted Patent: US 9,208,733 B2
• Time in Patent Office: Days
• US Class Current: 345/174
• CPC Class Codes: G09G 2300/0408 Integration of the drivers onto the display substrate
• CPC Class Codes: G09G 2330/12 Test circuits or failure detection circuits included in a display system, as permanent part thereof
• CPC Class Codes: G09G 3/006 Electronic inspection or testing of displays and display drivers, e.g. of LED or LCD displays testing individual LED's G01R31/2635; testing lamps G01R31/44; testing of optical features of LCD displays G02F1/1309
• CPC Class Codes: G09G 3/36 using liquid crystals

Abstract

Systems and methods for monitoring internal resistance of a display. The method may include supplying the display via a capacitor with a first voltage configured to enable the display to receive one or more touch inputs. After supplying the display with the first voltage, the method may include discharging the capacitor to a second voltage configured to enable the display to display image data. The method may then monitor a discharge waveform that corresponds to when the capacitor discharges from the first voltage to the second voltage. Based at least in part on the discharge waveform, the method may determine a chip on glass resistance value and a flex on glass resistance value that correspond to an internal resistance of the display.

Claims

1. A display driver circuit comprising:

a capacitor configured to provide a plurality of voltages to a display via a supply rail, wherein the capacitor is coupled in series with a chip on glass (COG) circuit and a flex on glass (FOG) circuit of the display;

a plurality of switches having a plurality of resistance values, wherein each resistance value is different, and wherein each switch is configured to couple the capacitor to ground when closed; and

a processor configured to measure a COG resistance value and a FOG resistance value by;

closing a first switch of the plurality of switches, thereby discharging the capacitor;

measuring a first amount of time between when the capacitor has a first voltage value and when the capacitor discharges to a second voltage value via the first switch;

opening the first switch after the capacitor discharges to the second voltage value;

closing a second switch of the plurality of switches;

measuring a second amount of time that corresponds to an amount of time between when the capacitor has the first voltage value and when the capacitor discharges to the second voltage value via the second switch; and

determining the COG resistance value and the FOG resistance value based at least in part on the first amount of time and the second amount of time.

2. The display driver circuit of claim 1, wherein the first voltage value corresponds to a voltage value configured to enable the display to receive one or more touch inputs.

3. The display driver circuit of claim 1, wherein the second voltage value corresponds to a voltage value configured to enable the display to display image data.

4. The display driver circuit of claim 1, comprising:

a comparator circuit configured to switch states when the capacitor reaches the second voltage value; and

a counter circuit configured to measure the first and second amounts of time based at least in part on when the comparator circuit switches states and a clock input.

5. The display driver circuit of claim 4, wherein the counter circuit is coupled to the plurality of switches and is configured to open the first switch when the capacitor discharges to the second voltage value.

6. The display driver circuit of claim 1, wherein the processor is configured to measure the COG resistance value and the FOG resistance value periodically.

7. The display driver circuit of claim 6, wherein the processor is configured to:

store each COG resistance value and FOG resistance value in a log; and

send the log to a server.

8. The display driver circuit of claim 1, wherein the processor is configured to determine the COG resistance value and FOG resistance value based on:

R_COG+R_FOG+R_SW1=t₁/C/(−

ln(V₁/V₀)); and

R_COG+R_FOG+R_SW2=t₂/C/(−

ln(V₁/V₀));

wherein R_COG corresponds to the COG resistance value, R_FOG corresponds to the FOG resistance value, R_SW1 corresponds to a resistance value of the first switch, R_SW2 corresponds to a resistance value of the second switch, t₁ corresponds to the first amount of time, t₂ corresponds to the second amount of time, C corresponds to a capacitance value of the capacitor, V₀ corresponds to the first voltage value, and V₁ corresponds to the second voltage value.

9. A system comprising:

a display configured to display image data and receive one or more touch inputs;

a capacitor configured to provide a plurality of voltages to the display via a supply rail, wherein the supply rail couples the capacitor in series with an internal resistance of the display;

a plurality of switches having a plurality of resistance values, wherein each resistance value is different, and wherein each switch is configured to couple the capacitor to ground when closed; and

a controller configured to measure an internal resistance value of the display by;

closing a first switch of the plurality of switches, thereby discharging the capacitor;

measuring a first amount of time between when the capacitor has a first voltage value and when the capacitor discharges to a second voltage value via the first switch;

opening the first switch after the capacitor discharges to the second voltage value;

closing a second switch of the plurality of switches;

measuring a second amount of time between when the capacitor has the first voltage value and when the capacitor discharges to a third voltage value via the second switch; and

determining the internal resistance value based at least in part on the first amount of time and the second amount of time.

10. The system of claim 9, comprising a comparator circuit coupled to the supply rail via a first resistor and to a voltage source via a second resistor, wherein the comparator circuit switches states when the capacitor discharges to the second voltage value.

11. The system of claim 10, wherein the controller measures the second amount of time by adjusting a resistance value of the first resistor or the second resistor, thereby adjusting a ratio of the first resistor to the second resistor, wherein the comparator circuit is configured to switch states when the capacitor discharges to the third voltage value after the ratio is adjusted.

12. The system of claim 10, wherein the first resistor, the second resistor, or any combination thereof is a variable resistor.

13. The system of claim 9, wherein each switch of the plurality of switches is associated with a different display manufacturer.

14. The system of claim 9, wherein the controller is configured to acquire a plurality of measurements of the internal resistance a plurality of times.

15. The system of claim 14, wherein one or more changes in the plurality of measurements of the internal resistance corresponds to a decreased quality of the display.

16. The system of claim 9, wherein the controller is configured to measure the internal resistance value based on:

R_COG+R_FOG+R_SW1=t₁/C/(−

ln(V₁/V₀)); and

R_COG+R_FOG+R_SW2=t₂/C/(−

ln(V₂/V₀))

wherein R_COG+R_FOG corresponds to the internal resistance value, R_SW1 corresponds to a resistance value of the first switch, R_SW2 corresponds to a resistance value of the second switch, t₁ corresponds to the first amount of time, t₂ corresponds to the second amount of time, C corresponds to a capacitance value of the capacitor, V₀ corresponds to the first voltage value, V₁ corresponds to the second voltage value, and V₂ corresponds to the third voltage value.

17. An electronic device comprising:

a display configured to display image data and receive one or more touch inputs;

a capacitor configured to provide a plurality of voltages to the display via a supply rail, wherein the supply rail couples the capacitor in series with chip on glass (COG) resistance and a flex on glass (FOG) resistance of the display;

a plurality of switches having a plurality of resistance values, wherein each resistance value is different, and wherein each switch is configured to couple the capacitor to ground when closed;

a comparator circuit coupled to the capacitor via a first resistor and to a reference voltage source via a second resistor; and

a processor configured to measure a COG resistance value and a FOG resistance value of the display by;

closing a first switch of the plurality of switches, thereby discharging the capacitor;

measuring an amount of time between when the comparator circuit changes states, wherein the comparator circuit changes states after the capacitor discharges from a first voltage value to a second voltage value;

opening the first switch after the capacitor discharges to the second voltage value;

adjusting a ratio of the first resistor to the second resistor, wherein the comparator circuit is configured to change states after the amount of time elapses when the capacitor is discharged from the first voltage value using a second switch of the plurality of switches;

determining a third voltage value that corresponds to a voltage of the capacitor when the comparator circuit changes states after the amount of time elapses when the capacitor is discharged using the second switch; and

determining the COG resistance and FOG resistance values based at least in part on the amount of time, the second voltage value, and the third voltage value.

18. The electronic device of claim 17, wherein the processor is configured to adjust the ratio by modifying a resistance value of the first resistor, the second resistor, or any combination thereof.

19. The electronic device of claim 17, wherein the processor is configured to determine the COG resistance and FOG resistance values based on:

R_COG+R_FOG+R_SW1=t₁/C/(−

ln(V₁/V₀)); and

R_COG+R_FOG+R_SW2=t₁/C/(−

ln(V₂/V₀))

wherein R_COG corresponds to the COG resistance value, R_FOG corresponds to the FOG resistance value, R_SW1 corresponds to a resistance value of the first switch, R_SW2 corresponds to a resistance value of the second switch, t₁ corresponds to the amount of time, C corresponds to a capacitance value of the capacitor, V₀ corresponds to the first voltage value, V1 corresponds to the second voltage value, and V₂ corresponds to the third voltage value.

20. A liquid crystal display (LCD), comprising:

a display driver circuit configured to provide the LCD with a plurality of voltages via a supply rail, wherein the display driver circuit comprises;

an external voltage source coupled to the supply rail;

a plurality of switches coupled between the external voltage source and an internal resistance of the display, wherein each switch has a different resistance value and is configured to couple the external voltage source to ground when closed;

a first resistor coupled to the supply rail at a node, wherein the node is between the internal resistance and the first resistor;

a second resistor coupled between the first resistor and a reference voltage source; and

a controller configured to measure an internal resistance value of the LCD by;

closing one of the plurality of switches;

measuring a current value through the one of the switches; and

determining the internal resistance value based at least in part on a difference between a first voltage value of the external voltage source and a second voltage value that corresponds to a voltage at the node and the current value.

21. The LCD of claim 20, wherein the controller is configured to determine the voltage at the node based at least in part on a voltage of the reference voltage source and a ratio of a resistance value of the first resistor to a resistance value of the second resistor.

22. The LCD of claim 20, wherein the external voltage source is a direct current (DC) voltage source.

23. A method for determining a chip on glass (COG) resistance value and a flex on glass (FOG) resistance value of a display, comprising:

supplying the display via a capacitor with a first voltage configured to enable the display to display image data;

discharging the capacitor to a second voltage configured to enable the display to receive one or more touch inputs;

monitoring a discharge waveform that corresponds to when the capacitor discharges from the first voltage to the second voltage; and

determining the COG resistance value and the FOG resistance value based at least in part on the discharge waveform.