MEMORY SYSTEM

• US 20140068149A1
• Filed: 01/31/2013
• Published: 03/06/2014
• Est. Priority Date: 09/05/2012
• Status: Active Grant

• Current Assignee: Toshiba Memory Corporation (Kioxia Corporation)
• Original Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Inventors: KANAMORI, Yuki, MIYAKE, Yusuke
• Granted Patent: US 9,292,428 B2
• Time in Patent Office: Days
• US Class Current: 711/103
• CPC Class Codes: G06F 12/0246 in block erasable memory, e.g. flash memory
• CPC Class Codes: G06F 7/58 Random or pseudo-random number generators
• CPC Class Codes: G11C 11/5628 Programming or writing circuits; Data input circuits
• CPC Class Codes: G11C 16/3495 Circuits or methods to detect or delay wearout of nonvolatile EPROM or EEPROM memory devices, e.g. by counting numbers of erase or reprogram cycles, by using multiple memory areas serially or cyclically
• CPC Class Codes: G11C 7/1006 Data managing, e.g. manipulating data before writing or reading out, data bus switches or control circuits therefor

Abstract

According to one embodiment, a memory system includes a nonvolatile semiconductor storage device, a first storage module, a second storage module, a controller, a random number generator, and a randomizing module. The first storage module stores a plurality of management data. The second storage module stores seed data. The controller issues a first command to designate one of the management data, and issues a second command to command writing in or reading from the storage device. The random number generator generates random number data, by shuffling the seed data, based on the management data that is designated by the first command. The randomizing module randomizes written data or read data, based on the random number data.

Claims

1. A memory system comprising:

a nonvolatile semiconductor storage device;

a first storage module configured to store a plurality of management data to manage writing in or reading from the nonvolatile semiconductor storage device;

a second storage module configured to store seed data to generate random number data;

a controller configured to issue a first command to designate one of the management data stored in the first storage module, and to issue a second command to designate writing in or reading from the nonvolatile semiconductor storage device;

a random number generating module configured to generate random number data by shuffling the seed data supplied from the second storage module based on the management data designated by the first command issued from the controller; and

a randomizing module configured to randomize write data or read data based on the random number data generated by the random number generating module.

2. The system according to claim 1, wherein

the controller issues the second command after the first command is issued.

3. The system according to claim 1, wherein

the controller issues the first command after the second command is issued.

4. The system according to claim 1, wherein

the randomizing module includes an exclusive-OR gate which is supplied with the random number data and the write data or the read data.

5. The system according to claim 1, wherein

the management data are one of number of erases the nonvolatile semiconductor storage device, number of reads from the nonvolatile semiconductor storage device, temperature information, time information, logical address, physical address, and cumulative sector value which indicates number of sectors.

7. The system according to claim 5, wherein

the controller issues commands which are different from each other and correspond to the respective seed data.

8. The system according to claim 5, wherein

the randomizing module includes an exclusive-OR gate which is supplied with the random number data and the write data or the read data.

6. A memory system comprising:

a nonvolatile semiconductor storage device;

a storage module configured to store a plurality of seed data to generate random number data;

a controller configured to designate one of the seed data stored in the storage module, and to issue a command to command writing in or reading from the nonvolatile semiconductor storage device;

a selector configured to select one seed data from the seed data of the storage module, based on the command;

a random number generator configured to generate random number data, based on the seed data selected by the selector; and

a randomizing module configured to randomize write data or read data, based on the random number data generated by the random number generator.

9. A memory system comprising:

a storage module;

a controller; and

a randomizing module configured to generate random number data based on first data that is stored in the storage module and second data to manage writing or reading of data that is designated by a command from the controller, and to randomize write data or read data based on the random number data.

10. The system according to claim 9, wherein

the first data is seed data to generate the random number data, and the second data is one of number of erases of the storage module, number of reads from the storage module, temperature information, time information, logical address, physical address, and cumulative sector value which indicates number of sectors.

11. The system according to claim 9, wherein

the controller issues a first command to designate one of the first data, and issues a second command to command writing in or reading from the storage module.

12. The system according to claim 11, wherein

the controller issues the second command after the first command is issued.

13. The system according to claim 11, wherein

the controller issues the first command after the second command is issued.

14. The system according to claim 11, wherein

the randomizing module includes:

a random number generating circuit which generates the random number data, based on the seed data serving as the first data and management data serving as the second data; and

a randomizing circuit which randomizes the write data or the read data based on the random number data generated by the random number generating circuit.

15. The system according to claim 14, wherein

the storage module is formed of a plurality of pages, to store a plurality of bits of data in one memory cell.

16. The system according to claim 15, further comprising:

an inverting circuit which inverts the data randomized by the randomizing circuit for each page, based on the first command.

17. The system according to claim 16, wherein

the storage module includes at least a lower page and an upper page, and

the inverting circuit inverts data of one of the lower page and the upper page, based on the second data.

18. The system according to claim 17, wherein

the second data is number of erases, and the inverting circuit inverts data of the lower page when the number of erases is an odd number, and inverts data of the upper page when the number of erases is an even number.

19. The system according to claim 17, wherein

the storage module includes a plurality of blocks which include the pages, and

the first data is set to a value which equalizes an average threshold level of each memory cell, when a block of the storage module is repeatedly used.