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Determination and Reduction of Parasitic Capacitance Variation Due to Display Noise

  • US 20140071087A1
  • Filed: 09/10/2013
  • Published: 03/13/2014
  • Est. Priority Date: 09/10/2012
  • Status: Active Grant
First Claim
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1. A method for reducing a parasitic capacitance between a display and a capacitive-touch sensing panel;

  • comprising;

    generating an admittance model of a plurality of parasitic capacitances between plurality of pixels;

    varying one or more of the plurality of parasitic capacitances in the admittance model;

    determining if the variance of the one or more of plurality of parasitic capacitances reduces an overall parasitic capacitance between the display and the capacitive-touch sensing panel; and

    if so, implementing the variance in at least one of the capacitive-touch sensing panel and the display.

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