DISPLAY APPARATUS INCORPORATING VERTICALLY ORIENTED ELECTRICAL INTERCONNECTS

• US 20140071142A1
• Filed: 09/13/2012
• Published: 03/13/2014
• Est. Priority Date: 09/13/2012
• Status: Abandoned Application

• Current Assignee: Snaptrack Incorporated (Qualcomm, Inc.)
• Original Assignee: Pixtronix, Incorporated (Qualcomm, Inc.)
• Inventors: Steyn, Jasper Lodewyk
• Application Number:
  US13/615,091
• Publication Number:
  US 20140071142A1
• Time in Patent Office: Days
• US Class Current: 345/531
• CPC Class Codes: B81B 2201/047 Optical MEMS not provided for in B81B2201/042 - B81B2201/045
• CPC Class Codes: B81C 1/00095 Interconnects
• CPC Class Codes: G02B 26/023 comprising movable attenuating elements, e.g. neutral density filters
• CPC Class Codes: G02B 26/08 for controlling the direction of light in light guides G02B6/35
• CPC Class Codes: G09G 3/346 based on modulation of the reflection angle, e.g. micromirrors micromirrors devices per se G02B26/0833
• CPC Class Codes: H01L 27/124 with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits wiring structures per se H01L23/52

Abstract

This disclosure provides systems, methods and apparatus for enabling a display to have a faster switching rate and an increased aperture ratio by using vertically oriented electrical interconnects with a reduced footprint. In one aspect, a display apparatus includes an array of display elements and an electrical interconnect connected to at least one display element in the array of display elements. A cross sectional aspect ratio of the electrical interconnect can be up to 1:1 or greater than 1:1.

Claims

1. A display apparatus, comprising:

an array of display elements; and

an electrical interconnect connected to at least one display element in the array of display elements,

wherein at least a portion of the electrical interconnect has a cross sectional aspect ratio that is greater than 1;

1.

2. The display apparatus of claim 1, wherein the cross sectional aspect ratio of the electrical interconnect is at least 2:

1.

3. The display apparatus of claim 1, wherein the cross sectional aspect ratio of the electrical interconnect is at least 3:

1.

4. The display apparatus of claim 1, further comprising a substrate over which the array of display elements is formed.

5. The display apparatus of claim 4, wherein the substrate is a transparent substrate.

6. The display apparatus of claim 4, further comprising at least two anchors that are spaced apart from one another along the substrate, and wherein the electrical interconnect is suspended over the substrate by the anchors.

7. The display apparatus of claim 6, further comprising a support material disposed below the electrical interconnect and between the anchors.

8. The display apparatus of claim 6, wherein the electrical interconnect is a first electrical interconnect, and further comprising a second electrical interconnect that extends crosswise relative to the first electrical interconnect, and the second electrical interconnect extends below the first electrical interconnect and through a gap between the anchors.

9. The display apparatus of claim 1, wherein the electrical interconnect has a cross sectional thickness that is less than 2 microns.

10. The display apparatus of claim 1, wherein the electrical interconnect has a cross sectional thickness that is no greater than 1 micron.

11. The display apparatus of claim 1, further comprising an array of thin film transistors connected to the array of display elements, and the electrical interconnect is connected to the at least one display element through at least one thin film transistor in the array of thin film transistors.

12. The display apparatus of claim 1, wherein the array of display elements comprises MEMS light modulators.

13. The display apparatus of claim 1, wherein at least a majority of the electrical interconnect has the cross sectional aspect ratio that is greater than 1:

1.

14. The display apparatus of claim 1, further comprising:

a display including the array of display elements and the electrical interconnect;

a processor that is configured to communicate with the display, the processor being configured to process image data; and

a memory device that is configured to communicate with the processor.

15. The display apparatus of claim 14, further comprising:

a driver circuit configured to send at least one signal to the display; and

a controller configured to send at least a portion of the image data to the driver circuit.

16. The display apparatus of claim 14, further comprising:

an image source module configured to send the image data to the processor, wherein the image source module comprises at least one of a receiver, transceiver, and transmitter.

17. The display apparatus of claim 14, further comprising:

an input device configured to receive input data and to communicate the input data to the processor.

18. A display apparatus, comprising:

a substrate;

an array of pixels formed over the substrate;

an electrical interconnect connected to at least two pixels in the array of pixels; and

at least three anchors that are successively arranged along the substrate and are spaced apart from one another along the substrate,

wherein the electrical interconnect is suspended at an elevated plane over the substrate by the three successive anchors, and the three successive anchors are substantially electrically isolated from one another below the elevated plane of the electrical interconnect.

19. The display apparatus of claim 18, wherein the substrate is a transparent substrate.

20. The display apparatus of claim 18, wherein the electrical interconnect has a cross sectional thickness that is less than 2 microns.

21. The display apparatus of claim 18, wherein the electrical interconnect has a cross sectional aspect ratio that is greater than 1:

1.

22. The display apparatus of claim 18, wherein the electrical interconnect has a cross sectional aspect ratio that is up to 1:

1.

23. The display apparatus of claim 18, wherein the array of pixels comprises a shutter-based light modulator.

24. The display apparatus of claim 23, wherein at least one layer of the electrical interconnect is formed from the same material as a corresponding layer of the shutter-based light modulator.

25. The display apparatus of claim 23, wherein the electrical interconnect and the shutter-based light modulator are suspended at substantially the same height over the substrate.

26. The display apparatus of claim 18, wherein the electrical interconnect is connected to at least one of:

a row of pixels in the array of pixels; and

a column of pixels in the array of pixels.

27. The display apparatus of claim 18, further comprising a support material disposed below the electrical interconnect and between a successive pair of the anchors.

28. The display apparatus of claim 18, wherein the electrical interconnect is a first electrical interconnect, and further comprising a second electrical interconnect that extends crosswise relative to the first electrical interconnect, and the second electrical interconnect extends below the first electrical interconnect and through a gap between a successive pair of the anchors.

29. An apparatus, comprising:

a transparent substrate;

a plurality of MEMS devices disposed over the transparent substrate;

an electrical interconnect connected to at least one of the plurality of MEMS devices,

wherein the electrical interconnect has a cross sectional aspect ratio that is greater than 1;

1 and a cross sectional thickness that is less than 2 microns.

30. The apparatus of claim 29, wherein the plurality of MEMS devices comprises an array of light modulators, and the electrical interconnect is connected to at least two light modulators in the array of light modulators.

31. The apparatus of claim 29, wherein the cross sectional aspect ratio of the electrical interconnect is at least 2:

1.

32. The apparatus of claim 29, wherein the cross sectional thickness of the electrical interconnect is no greater than 1 micron.

33. The apparatus of claim 29, further comprising an anchor, and wherein the electrical interconnect is suspended over the transparent substrate by the anchor.

34. The apparatus of claim 29, wherein at least one layer of the electrical interconnect is formed from the same material as a corresponding layer of the MEMS devices.

35. A method of manufacturing a display assembly, comprising:

forming a mold over a substrate, wherein the mold is formed with a trench having a sidewall and a bottom;

depositing an interconnect material adjacent to the bottom and the sidewall of the trench; and

removing the interconnect material deposited adjacent to the bottom of the trench while retaining at least a portion of the interconnect material deposited adjacent to the sidewall to form an electrical interconnect.

36. The method of claim 35, wherein the interconnect material is deposited adjacent to the sidewall so as to have a thickness no greater than 1 micron.

37. The method of claim 35, wherein removing the interconnect material comprises applying an anisotropic etch to the interconnect material.

38. The method of claim 37, wherein applying the anisotropic etch comprises applying a voltage bias to the substrate.

39. The method of claim 35, wherein the interconnect material is deposited so as to be in contact with an anchor material that is disposed adjacent to a lower portion of the sidewall.

40. A method of manufacturing a display assembly, comprising:

forming a mold over a substrate, wherein the mold is formed with a plurality of openings that are spaced apart from one another;

depositing an electrically conducting material in the plurality of openings and over the mold to form a plurality of anchors in the plurality of openings;

patterning the electrically conducting material deposited over the mold to form an electrical interconnect extending between the plurality of anchors; and

removing the mold such that the electrical interconnect is suspended over the substrate by the plurality of anchors, and the mold is removed while retaining at least a portion of the mold disposed below the electrical interconnect and between the plurality anchors.