Solar Cell Having Selective Emitter

• US 20140073081A1
• Filed: 11/12/2013
• Published: 03/13/2014
• Est. Priority Date: 08/30/2011
• Status: Abandoned Application

• Current Assignee: National Tsing Hua University
• Original Assignee: National Tsing Hua University
• Inventors: Wang, Li-Karn
• Application Number:
  US14/077,727
• Publication Number:
  US 20140073081A1
• Time in Patent Office: Days
• US Class Current: 438/71
• CPC Class Codes: H01L 31/022425 for solar cells
• CPC Class Codes: H01L 31/068 the potential barriers being only of the PN homojunction type, e.g. bulk silicon PN homojunction solar cells or thin film polycrystalline silicon PN homojunction solar cells
• CPC Class Codes: H01L 31/18 Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
• CPC Class Codes: H01L 31/1804 comprising only elements of Group IV of the Periodic Table
• CPC Class Codes: Y02E 10/547 Monocrystalline silicon PV cells
• CPC Class Codes: Y02P 70/50 Manufacturing or production processes characterised by the final manufactured product

Abstract

The present invention provides a solar cell having a selective emitter structure on a doped silicon substrate. The silicon substrate is mono-crystalline or multi-crystalline. A plurality of trenches are formed at the illuminated side of the silicon substrate. After one-time diffusion doping, the silicon substrate is processed through selective etching. The region outside the trenches obtains a lower doping concentration, while the region of the trenches remains to be highly doped. Thus, a selective emitter structure is formed.

Claims

1-13. -13. (canceled)

14. A method of fabricating a solar cell having a selective emitter at least comprising the following steps of:

first forming a plurality of trenches on a first surface of a doped silicon substrate;

then diffusing a dopant into the first surface so as to form a heavily doped layer on substantially all of the first surface;

then forming barrier material only in the trenches;

then selectively etching at least the first surface of the substrate so as to reduce a thickness of the heavily doped layer outside the trenches so as to form a lightly doped layer while the heavily doped layer remains in the trenches; and

then removing the barrier material so as to define the heavily doped layer arranged in the trenches and the lightly doped layer in regions of the first surface outside the trenches.

15. The method of claim 14, wherein the trenches are formed to a depth between 0.5 micrometer (μ

m) and 100 μ

m.

16. The method of claim 14, further comprising texturing at least portions of the first surface so as to define a first textured surface.

17. The method of claim 16, wherein the first textured surface comprises a plurality of pyramidal protrusions that act to trap incident light.

18. The method of claim 16, wherein the texturing is applied only to portions of the first surface not occupied by the trenches.

19. The method of claim 16, wherein the texturing is applied to substantially all of the first surface, including the regions in the trenches and outside the trenches.

20. The method of claim 16, wherein texturing is also applied to an opposite second surface of the substrate to create a second textured surface.

21. The method of claim 16, wherein the texturing is performed between the steps of forming the trenches and diffusing the dopant.

22. The method of claim 16, wherein the texturing is performed before the steps of forming the trenches and diffusing the dopant.

23. The method of claim 14, wherein a front contact is obtained in said trenches on said first surface, and a back surface field and a back contact are obtained on an opposite second surface of said silicon substrate.

24. The method of claim 14, wherein an anti-reflective layer is obtained on said first surface.

25. The method of claim 14, wherein a passivation layer is obtained on said first surface.

26. The method of claim 14, wherein a passivation layer is obtained on an opposite second surface of said silicon substrate.

27. The solar cell according to claim 14, wherein the doped silicon substrate is doped a first n- or p-type and the diffused dopant is an opposite second p- or n-type.

28. The solar cell according to claim 14, wherein the doped silicon substrate is doped a first n- or p-type and the diffused dopant is a similar second n- or p-type.