METHOD FOR MANUFACTURING SILICON CARBIDE SEMICONDUCTOR DEVICE

• US 20140073116A1
• Filed: 08/02/2013
• Published: 03/13/2014
• Est. Priority Date: 09/12/2012
• Status: Active Grant

• Current Assignee: Sumitomo Electric Industries Limited (Sumitomo Corporation)
• Original Assignee: Sumitomo Electric Industries Limited (Sumitomo Corporation)
• Inventors: Hayashi, Hideki, Masuda, Takeyoshi
• Granted Patent: US 9,087,693 B2
• Time in Patent Office: Days
• US Class Current: 438/478
• CPC Class Codes: H01L 21/02529 Silicon carbide
• CPC Class Codes: H01L 21/02636 Selective deposition, e.g. simultaneous growth of mono- and non-monocrystalline semiconductor materials
• CPC Class Codes: H01L 21/049 Conductor-insulator-semiconductor electrodes, e.g. MIS contacts
• CPC Class Codes: H01L 21/28255 the insulator being formed after the semiconductor body, the semiconductor belonging to Group IV and not being elemental silicon, e.g. Ge, SiGe, SiGeC
• CPC Class Codes: H01L 21/3065 Plasma etching; Reactive-ion etching
• CPC Class Codes: H01L 21/308 using masks H01L21/3063, H01L21/3065 take precedence
• CPC Class Codes: H01L 29/045 by their particular orientation of crystalline planes
• CPC Class Codes: H01L 29/1608 Silicon carbide
• CPC Class Codes: H01L 29/407 Recessed field plates, e.g. trench field plates, buried field plates
• CPC Class Codes: H01L 29/4236 within a trench, e.g. trench gate electrode, groove gate electrode
• CPC Class Codes: H01L 29/42368 the thickness being non-uniform
• CPC Class Codes: H01L 29/511 with a compositional variation, e.g. multilayer structures H01L29/516 takes precedence
• CPC Class Codes: H01L 29/66068 the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
• CPC Class Codes: H01L 29/66666 Vertical transistors H01L29/66712, H01L29/66742 take precedence
• CPC Class Codes: H01L 29/66734 with a step of recessing the gate electrode, e.g. to form a trench gate electrode
• CPC Class Codes: H01L 29/7397 and a gate structure lying on a slanted or vertical surface or formed in a groove, e.g. trench gate IGBT
• CPC Class Codes: H01L 29/7813 with trench gate electrode, e.g. UMOS transistors trench gate electrodes per se H01L29/4236

Abstract

A silicon carbide substrate including a first layer having first conductivity type, a second layer having second conductivity type, and a third layer having the first conductivity type is formed. A trench provided with an inner surface having a side wall surface and a bottom surface is formed, the side wall surface extending through the third layer and the second layer and reaching the first layer, the bottom surface being formed of the first layer. A silicon film is formed to cover the bottom surface. A gate oxide film is formed on the inner surface by oxidation in the trench. The gate oxide film includes a first portion formed by oxidation of the silicon carbide substrate, and a second portion formed by oxidation of the silicon film on the bottom surface. Accordingly, a method for manufacturing a silicon carbide semiconductor device having a high breakdown voltage is provided.

Claims

1. A method for manufacturing a silicon carbide semiconductor device, comprising the steps of:

forming a silicon carbide substrate including a first layer having first conductivity type, a second layer provided on said first layer and having second conductivity type, and a third layer provided on said second layer, separated from said first layer by said second layer, and having said first conductivity type;

forming a trench provided with an inner surface having a side wall surface and a bottom surface, said side wall surface extending through said third layer and said second layer and reaching said first layer, said bottom surface being formed of said first layer;

forming a silicon film to cover said bottom surface;

forming a gate oxide film on said inner surface by oxidation in said trench, said gate oxide film including a first portion formed by oxidation of said silicon carbide substrate, and a second portion formed by oxidation of said silicon film on said bottom surface; and

forming a gate electrode on said gate oxide film.

2. The method for manufacturing a silicon carbide semiconductor device according to claim 1, wherein

said step of forming a gate electrode is performed such that said gate electrode makes direct contact with said first portion on said second layer.

3. The method for manufacturing a silicon carbide semiconductor device according to claim 2, wherein

said step of forming a silicon film is performed such that said silicon film covers said second layer on said side wall surface, and

said method for manufacturing a silicon carbide semiconductor device further comprises the step of removing a portion of said silicon film such that said silicon film remains on said bottom surface and said second layer is exposed at said side wall surface.

4. The method for manufacturing a silicon carbide semiconductor device according to claim 3, wherein

said step of forming a silicon film is performed such that said silicon film has a first thickness on said bottom surface and has a second thickness on said side wall surface formed of said second layer, said first thickness being larger than said second thickness.

5. The method for manufacturing a silicon carbide semiconductor device according to claim 4, wherein

said step of removing a portion of said silicon film includes the steps of

oxidizing said silicon film for a thickness smaller than said first thickness and larger than said second thickness, and

removing a portion of said silicon film that has been oxidized in said step of oxidizing said silicon film.

6. The method for manufacturing a silicon carbide semiconductor device according to claim 1, wherein

said step of forming a trench includes the steps of

forming a mask having an opening on said third layer, and

etching said silicon carbide substrate using said mask, and

said step of forming a silicon film is performed using said mask.

7. The method for manufacturing a silicon carbide semiconductor device according to claim 6, wherein

said step of etching said silicon carbide substrate is performed such that said silicon carbide substrate is side-etched from said opening of said mask.

8. The method for manufacturing a silicon carbide semiconductor device according to claim 6, wherein

said step of etching said silicon carbide substrate includes the step of thermally etching said silicon carbide substrate.