VARIABLE RESISTANCE NONVOLATILE MEMORY ELEMENT WRITING METHOD AND VARIABLE RESISTANCE NONVOLATILE MEMORY DEVICE

• US 20140078811A1
• Filed: 11/21/2012
• Published: 03/20/2014
• Est. Priority Date: 12/02/2011
• Status: Active Grant

• Current Assignee: Panasonic Semiconductor Solutions Co., Ltd. (Winbond Electronics Corporation)
• Original Assignee: Panasonic Corporation (Panasonic Holdings Corporation)
• Inventors: Kawai, Ken, Shimakawa, Kazuhiko, Katoh, Yoshikazu, Ikeda, Yuichiro
• Granted Patent: US 9,001,557 B2
• Time in Patent Office: Days
• US Class Current: 365/148
• CPC Class Codes: G11C 13/00 Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
• CPC Class Codes: G11C 13/004 Reading or sensing circuits or methods
• CPC Class Codes: G11C 13/0064 Verifying circuits or methods
• CPC Class Codes: G11C 13/0069 Writing or programming circuits or methods
• CPC Class Codes: G11C 2013/0073 Write using bi-directional cell biasing
• CPC Class Codes: G11C 2013/0092 Write characterized by the shape, e.g. form, length, amplitude of the write pulse

Abstract

Provided is a method of writing to a variable resistance nonvolatile memory element which is capable of both improving retention characteristics and enlarging a window of operation. In the method of writing, to write “1” data (LR), first a weak HR writing process is performed in which a weak HR writing voltage pulse set for changing the variable resistance nonvolatile memory element to an intermediate resistance state is applied and, subsequently, a LR writing process is performed in which a LR writing voltage pulse set for changing the variable resistance nonvolatile memory element from the intermediate resistance state to a LR state is applied.

Claims

1. A method of writing to a variable resistance nonvolatile memory element that changes from a first resistance state for storing first information to a second resistance state for storing second information upon application of a pulse of a first voltage and changes from the second resistance state to the first resistance state upon application of a pulse of a second voltage having a polarity that is different than a polarity of the first voltage, the method of writing comprising

weak writing and, subsequently, normal writing which change the variable resistance nonvolatile memory element from the first resistance state to the second resistance state,

wherein in the weak writing, the variable resistance nonvolatile memory element is changed to the second resistance state by a pulse of a third voltage having a same polarity as the polarity of the first voltage and an absolute value that is different than an absolute value of the first voltage being applied to the variable resistance nonvolatile memory element and, subsequently, the variable resistance nonvolatile memory element is changed to an intermediate resistance state having a resistance value between a resistance value of the first resistance state and a resistance value of the second resistance state by a pulse of a fourth voltage having a same polarity as the polarity of the second voltage and an absolute value that is less than an absolute value of the second voltage being applied to the variable resistance nonvolatile memory element,

in the normal writing, the variable resistance nonvolatile memory element is changed from the intermediate resistance state to the second resistance state by a pulse of the first voltage being applied to the variable resistance nonvolatile memory element at least once, and

the absolute value of the fourth voltage is less than the absolute value of the third voltage.

2. The method of writing according to claim 1,

wherein the absolute value of the third voltage is less than the absolute value of the first voltage.

3. The method of writing according to claim 1,

wherein in the normal writing, a pulse of a fifth voltage having a same polarity as the polarity of the second voltage and an absolute value that is less than the absolute value of the fourth voltage and, subsequently, a pulse of the first voltage are applied to the variable resistance nonvolatile memory element.

4. The method of writing according to claim 1, further comprising

verifying, after the normal writing, whether writing for the second resistance state is complete,

wherein the normal writing and the verifying are repeated until it is verified in the verifying that the writing for the second resistance state is complete.

5. A variable resistance nonvolatile memory device comprising:

a variable resistance nonvolatile memory element including a first electrode, a second electrode, and a variable resistance layer interposed between the first electrode and the second electrode; and

a write circuit that writes information to the variable resistance nonvolatile memory element,

wherein the variable resistance nonvolatile memory element changes from a first resistance state for storing first information to a second resistance state for storing second information upon application of a pulse of a first voltage and changes from the second resistance state to the first resistance state upon application of a pulse of a second voltage having a polarity that is different than a polarity of the first voltage,

the write circuit performs weak writing and, subsequently, normal writing which change the variable resistance nonvolatile memory element from the first resistance state to the second resistance state,

in the weak writing, the variable resistance nonvolatile memory element is changed to the second resistance state by a pulse of a third voltage having a same polarity as the polarity of the first voltage and an absolute value that is different than an absolute value of the first voltage being applied to the variable resistance nonvolatile memory element and, subsequently, the variable resistance nonvolatile memory element is changed to an intermediate resistance state having a resistance value between a resistance value of the first resistance state and a resistance value of the second resistance state by a pulse of a fourth voltage having a same polarity as the polarity of the second voltage and an absolute value that is less than an absolute value of the second voltage being applied to the variable resistance nonvolatile memory element,

in the normal writing, the variable resistance nonvolatile memory element is changed from the intermediate resistance state to the second resistance state by a pulse of the first voltage being applied to the variable resistance nonvolatile memory element at least once, and

the absolute value of the fourth voltage is less than the absolute value of the third voltage.

6. The variable resistance nonvolatile memory device according to claim 5,

wherein the absolute value of the third voltage is less than the absolute value of the first voltage.

7. The variable resistance nonvolatile memory device according to claim 5,

wherein in the normal writing, the write circuit applies a pulse of a fifth voltage having a same polarity as the polarity of the second voltage and an absolute value that is less than the absolute value of the fourth voltage and, subsequently, a pulse of the first voltage to the variable resistance nonvolatile memory element.

8. The variable resistance nonvolatile memory device according to claim 5, further comprising:

a read circuit that reads information from the variable resistance nonvolatile memory element; and

a control circuit that controls the write circuit and the read circuit and verifies, after the normal writing by the write circuit, whether writing for the second resistance state is complete by referring to information read by the read circuit,

wherein the control circuit controls the write circuit and the read circuit to repeat (i) the writing by the write circuit to change the variable resistance nonvolatile memory element from the first resistance state to the second resistance state and (ii) the verifying until the control circuit verifies that the writing for the second resistance state is complete.

9. The variable resistance nonvolatile memory device according to claim 5,

wherein the variable resistance nonvolatile memory element is included in a memory cell with a selecting element that is connected in series to the variable resistance nonvolatile memory element and switchable between a conducting state and a nonconducting state, and

the write circuit performs the weak writing and the normal writing on the variable resistance nonvolatile memory element included in the memory cell.

10. The variable resistance nonvolatile memory device according to claim 5,

wherein the variable resistance nonvolatile memory element has a higher resistance value in the first resistance state than in the second resistance state.