COEFFICIENT DETERMINING APPARATUS, EQUALIZER, RECEIVER AND TRANSMITTER

• US 20140079408A1
• Filed: 09/13/2013
• Published: 03/20/2014
• Est. Priority Date: 09/14/2012
• Status: Active Grant

• Current Assignee: Fujitsu Limited
• Original Assignee: Fujitsu Limited
• Inventors: YAN, Meng, TAO, Zhenning, LI, Lei
• Granted Patent: US 9,106,339 B2
• Time in Patent Office: Days
• US Class Current: 398/152
• CPC Class Codes: H04B 10/2507 for the reduction or elimination of distortion or dispersion
• CPC Class Codes: H04L 2027/0026 Correction of carrier offset
• CPC Class Codes: H04L 25/03006 Arrangements for removing intersymbol interference
• CPC Class Codes: H04L 7/042 Detectors therefor, e.g. correlators, state machines digital correlators in general G06F17/15

Abstract

Embodiments of the present invention provide a coefficient determining apparatus, equalizer, receiver and transmitter. The coefficient determining apparatus comprises: a synchronizer configured to find a position of a training sequence from signals containing the training sequence received by a transmitter; and a first processor configured to set an initial tap coefficient of an equalizer according to the received signals and the training sequence; wherein in each polarization state, the training sequence comprises n pairs of training symbols, in the n pairs of training symbols, the training symbols of the same pair being identical, the training symbols of the different pair being different, a cyclic prefix and a cyclic postfix being respectively inserted before and after each pair of training symbols, and n being an integer greater than 1. By using the training sequence contained in the transmitted signals to determine an initial tap coefficient of the equalizer relatively close to the optimal value, channel damages may be approximately compensated, and the receiver is facilitated in further processing the signals.

Claims

1. A coefficient determining apparatus, comprising:

a synchronizer configured to find a position of a training sequence from signals containing the training sequence received by a transmitter; and

a first processor configured to set an initial tap coefficient of an equalizer according to the received signals and the training sequence;

wherein in each polarization state, the training sequence comprises n pairs of training symbols, in the n pairs of training symbols, the training symbols of the same pair being identical, the training symbols of the different pair being different, a cyclic prefix and a cyclic postfix being respectively inserted before and after each pair of training symbols, and n being an integer greater than 1.

2. The apparatus according to claim 1, wherein the training sequence further satisfies one or more of the following conditions:

there is a guard interval between the training sequence and payload data;

training symbols of different pairs have low correlation;

data belonging to training symbols of different pairs but positioned at the same frequency point in two polarization states are uncorrelated;

the training symbols of the training sequence are selected from a constant amplitude zero auto correlation sequence family; and

the lengths of the training symbols of the training sequence are prime numbers.

3. The apparatus according to claim 1, wherein the synchronizer comprises:

a first correlation calculator configured to calculate, according to a length N_f of the training symbols, the number of the training symbols and the lengths of the cyclic prefix and cyclic postfix, correlation values of N_f sampling values before and N_f sampling values after n sections of sampling values with a length of 2 N_f in each polarization state starting from each sampling point;

a first modulus squarer configured to calculate a square of the moduli of the correlation values;

a first weighting averager configured to perform weighted average on a predefined sampling point serial number by using the square of the moduli of the correlation values in two polarization states, so as to obtain a starting position of the training sequence;

wherein the predefined sampling point serial number refers to a sampling point serial number of the square of the moduli of the correlation values α

times greater than a maximum square of the moduli of the correlation value, the range of α

being between (n−

1)/n and 1; and

a second processor configured to determine, according to the starting position, the length N_f of the training symbols and the lengths of the cyclic prefix and cyclic postfix, a position of the training sequence in the received signals.

4. The apparatus according to claim 2, wherein the synchronizer comprises:

a first correlation calculator configured to calculate, according to a length N_f of the training symbols, the number of the training symbols and the lengths of the cyclic prefix and cyclic postfix, correlation values of N_f sampling values before and N_f sampling values after n sections of sampling values with a length of 2 N_f in each polarization state starting from each sampling point;

a first modulus squarer configured to calculate a square of the moduli of the correlation values;

a first weighting averager configured to perform weighted average on a predefined sampling point serial number by using the square of the moduli of the correlation values in two polarization states, so as to obtain a starting position of the training sequence;

wherein the predefined sampling point serial number refers to a sampling point serial number of the square of the moduli of the correlation values α

times greater than a maximum square of the moduli of the correlation value, the range of α

being between (n−

1)/n and 1; and

a second processor configured to determine, according to the starting position, the length N_f of the training symbols and the lengths of the cyclic prefix and cyclic postfix, a position of the training sequence in the received signals.

5. The apparatus according to claim 1, wherein the apparatus further comprises:

a frequency difference compensator configured to estimate and compensate for a frequency difference between the received data signals;

and the first processor is further configured to set the initial tap coefficient of the equalizer according to the training sequence and the data signals compensated by the frequency difference compensator with respect to frequency difference.

6. The apparatus according to claim 5, wherein the frequency difference compensator comprises:

a first frequency difference estimator configured to calculate a first frequency difference by using a correlation value corresponding to the starting position of the training sequence, the length of the training sequence and a sampling time interval;

a first frequency difference compensator configured to perform first frequency difference compensation on the received data signals by using the first frequency difference;

a first converter configured to convert the time domain signals to which the training sequence corresponds into a frequency domain;

a first power calculator configured to calculate the power of the training sequence at each frequency point;

a second frequency difference estimator configured to calculate a second frequency difference by using the calculated power, positions of frequency points padded with data and positions of frequency points padded with zero in the frequency spectrum of the training sequence; and

a second frequency difference compensator configured to, according to the second frequency difference, perform second frequency difference compensation on the signals on which the first frequency difference compensation has been performed.

7. A synchronizer, comprising:

a second correlation calculator configured to calculate, according to signals containing a training sequence, a length N_f of training symbols of the training sequence, the number of the training symbols and the lengths of a cyclic prefix and a cyclic postfix inserted before and after the training symbols, correlation values of N_f sampling values before and N_f sampling values after n sections of sampling values with a length of 2 N_f in each polarization state starting from each sampling point;

wherein in each polarization state, the training sequence comprises n pairs of training symbols, in the n pairs of training symbols, the training symbols of the same pair being identical, and the training symbols of different pairs being different, a cyclic prefix and a cyclic postfix being respectively inserted before and after each pair of training symbols, and n being an integer greater than 1;

a second modulus squarer configured to calculate a square of the moduli of the correlation values;

a second weighting averager configured to perform weighted average on a predefined sampling point serial number by using the square of the moduli of the correlation values in two polarization states, so as to obtain a starting position of the training sequence;

wherein the predefined sampling point serial number refers to a sampling point serial number of the square of the moduli of the correlation values α

times greater than a maximum square of the moduli of the correlation value, the range of α

being between (n−

1)/n and 1; and

a fifth processor configured to determine, according to the starting position, the length of the training symbols and the lengths of the cyclic prefix and cyclic postfix, a position of the training sequence in the data signals.

8. A frequency difference compensator, comprising:

a third frequency difference estimator configured to calculate a first frequency difference by using a correlation value corresponding to a starting position of the training sequence in received signals containing the training sequence, a length N_f of training symbols of the training sequence and a sampling time interval;

wherein in each polarization state, the training sequence comprises n pairs of training symbols, in the n pairs of training symbols, the training symbols of the same pair being identical, and the training symbols of different pairs being different, a cyclic prefix and a cyclic postfix being respectively inserted before and after each pair of training symbols, and n being an integer greater than 1;

a third frequency difference compensator configured to perform first frequency difference compensation on the received data signals by using the first frequency difference;

a third converter configured to convert the time domain signals to which the training sequence corresponds into a frequency domain;

a second power calculator configured to calculate the power of the training sequence at each frequency point;

a fourth frequency difference estimator configured to calculate a second frequency difference by using the calculated power, a position of a frequency point padded with data and positions of frequency point padded with zero in the frequency spectrum of the training sequence; and

a fourth frequency difference compensator configured to, according to the second frequency difference, perform second frequency difference compensation on the signals on which the first frequency difference compensation has been performed.