PROCESSOR HAVING INSTRUCTION SET WITH USER-DEFINED NON-LINEAR FUNCTIONS FOR DIGITAL PRE-DISTORTION (DPD) AND OTHER NON-LINEAR APPLICATIONS

• US 20140086361A1
• Filed: 10/26/2012
• Published: 03/27/2014
• Est. Priority Date: 10/27/2011
• Status: Abandoned Application

• Current Assignee: Intel Corporation
• Original Assignee: LSI Corporation (Broadcom, Inc.)
• Inventors: Azadet, Kameran, Yu, Meng-Lin, Pinault, Steven C., Williams, Joseph, Molina, Albert
• Application Number:
  US13/701,384
• Publication Number:
  US 20140086361A1
• Time in Patent Office: Days
• US Class Current: 375/297
• CPC Class Codes: G06F 17/15 Correlation function computation including computation of convolution operations arithmetic circuits for sum of products per se, e.g. multiply-accumulators G06F7/5443; digital filters, e.g. FIR, IIR, adaptive filters H03H17/00
• CPC Class Codes: G06F 5/01 for shifting, e.g. justifying, scaling, normalising digital stores in which the information is moved stepwise, e.g. shift-registers G11C19/00; digital stores in which the information circulates G11C21/00
• CPC Class Codes: G06F 9/3001 Arithmetic instructions
• CPC Class Codes: G06F 9/30036 Instructions to perform operations on packed data, e.g. vector, tile or matrix operations
• CPC Class Codes: G06F 9/3895 for complex operations, e.g. multidimensional or interleaved address generators, macros
• CPC Class Codes: H03F 1/0288 using a main and one or several auxiliary peaking amplifiers whereby the load is connected to the main amplifier using an impedance inverter, e.g. Doherty amplifiers
• CPC Class Codes: H03F 1/3241 using predistortion circuits H03F1/3211, H03F1/3217 take precedence
• CPC Class Codes: H03F 1/3258 based on polynomial terms
• CPC Class Codes: H03F 2200/336 A I/Q, i.e. phase quadrature, modulator or demodulator being used in an amplifying circuit
• CPC Class Codes: H03F 2201/3209 the amplifier comprising means for compensating memory effects
• CPC Class Codes: H03F 2201/3212 Using a control circuit to adjust amplitude and phase of a signal in a signal path
• CPC Class Codes: H03F 2201/3224 Predistortion being done for compensating memory effects
• CPC Class Codes: H03F 2201/3233 Adaptive predistortion using lookup table, e.g. memory, RAM, ROM, LUT, to generate the predistortion
• CPC Class Codes: H03F 3/189 High-frequency amplifiers, e.g. radio frequency amplifiers
• CPC Class Codes: H03F 3/24 of transmitter output stages
• CPC Class Codes: H03H 17/06 Non-recursive filters
• CPC Class Codes: H03M 3/30 Delta-sigma modulation
• CPC Class Codes: H04B 1/0003 Software-defined radio [SDR] systems, i.e. systems wherein components typically implemented in hardware, e.g. filters or modulators/demodulators, are implented using software, e.g. by involving an AD or DA conversion stage such that at least part of the signal processing is performed in the digital domain digital baseband systems H04L25/00; digital modulation/demodulation H04L27/00; CDMA H04B1/707; TDMA H04B7/2643; image transmission H04N5/00
• CPC Class Codes: H04B 1/0475 with means for limiting noise, interference or distortion H04B1/0483 takes precedence
• CPC Class Codes: H04B 1/62 for providing a predistortion of the signal in the transmitter and corresponding correction in the receiver, e.g. for improving the signal/noise ratio
• CPC Class Codes: H04B 2001/0408 : with power amplifiers
• CPC Class Codes: H04L 1/0054 : Maximum-likelihood or sequential decoding, e.g. Viterbi, Fano, ZJ algorithms
• CPC Class Codes: H04L 25/02 : Details ; arrangements for supplying electrical power along data transmission lines systems for transmitting signals via power distribution lines H04B3/54
• CPC Class Codes: H04L 25/03 : Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
• CPC Class Codes: H04L 25/03178 : Arrangements involving sequence estimation techniques
• CPC Class Codes: H04L 25/03216 : using the M-algorithm
• CPC Class Codes: H04L 25/4917 : using multilevel codes
• CPC Class Codes: H04L 27/2334 : using filters
• CPC Class Codes: H04L 27/2623 : Reduction thereof by clipping

Abstract

A processor is provided having an instruction set with user-defined non-linear functions for digital pre-distortion (DPD) and other non-linear applications. A signal processing function, such as DPD, is implemented in software by obtaining at least one software instruction that performs at least one non-linear function for an input value, x, wherein the at least one non-linear function comprises at least one user-specified parameter; in response to at least one of the software instructions for at least one non-linear function having at least one user-specified parameter, performing the following steps: invoking at least one functional unit that implements the at least one software instruction to apply the non-linear function to the input value, x; and generating an output corresponding to the non-linear function for the input value, x. The user-specified parameter can optionally be loaded from memory into at least one register.

Claims

1. A method performed by a processor for implementing a signal processing function in software, comprising:

obtaining at least one software instruction that performs at least one non-linear function for an input value, x, wherein said at least one non-linear function comprises at least one user-specified parameter;

in response to at least one of said software instructions for at least one non-linear function having at least one user-specified parameter, performing the following steps;

invoking at least one functional unit that implements said at least one software instruction to apply said non-linear function to said input value, x; and

generating an output corresponding to said non-linear function for said input value, x.

2. The method of claim 1, wherein said signal processing function comprises digital pre-distortion.

3. The method of claim 1, further comprising the step of loading said at least one user-specified parameter from memory into at least one register.

4. The method of claim 1, wherein said user-specified parameter comprises a look-up table storing values of said non-linear function for a finite number of input values.

5. The method of claim 4, wherein said user-specified parameter comprises one or more coefficients employed by said non-linear function to perform polynomial interpolation between entries of said look-up table.

6. The method of claim 1, wherein said processor comprises a vector processor.

7. The method of claim 1, wherein said input value, x, comprises a vector and wherein said output comprises a vector.

8. A processor configured to implement a signal processing function in software, comprising:

a memory; and

at least one hardware device, coupled to the memory, operative to;

obtain at least one software instruction that performs at least one non-linear function for an input value, x, wherein said at least one non-linear function comprises at least one user-specified parameter;

in response to at least one of said software instructions for at least one non-linear function having at least one user-specified parameter, performing the following;

invoke at least one functional unit that implements said at least one software instruction to apply said non-linear function to said input value, x; and

generate an output corresponding to said non-linear function for said input value, x.

9. The processor of claim 8, wherein said signal processing function comprises digital pre-distortion.

10. The processor of claim 8, wherein said at least one hardware device is further configured to load said at least one user-specified parameter from memory into at least one register.

11. The processor of claim 8, wherein said user-specified parameter comprises a look-up table storing values of said non-linear function for a finite number of input values.

12. The processor of claim 11, wherein said user-specified parameter comprises one or more coefficients employed by said non-linear function to perform polynomial interpolation between entries of said look-up table.

13. The processor of claim 8, wherein said processor comprises a vector processor.

14. The processor of claim 8, wherein said input value, x, comprises a vector and wherein said output comprises a vector.

15. A method performed by a processor for implementing digital pre-distortion in software, comprising:

obtaining at least one software instruction that performs at least one non-linear function for an input value, x, wherein said at least one non-linear function comprises at least one user-specified parameter;

in response to at least one of said software instructions for at least one non-linear function having at least one user-specified parameter, performing the following steps;

invoking at least one functional unit that implements said at least one software instruction to apply said non-linear function to said input value, x; and

generating an output corresponding to said non-linear function for said input value, x.

16. The method of claim 15, further comprising the step of loading said at least one user-specified parameter from memory into at least one register.

17. The method of claim 15, wherein said user-specified parameter comprises a look-up table storing values of said non-linear function for a finite number of input values.

18. The method of claim 17, wherein said user-specified parameter comprises one or more coefficients employed by said non-linear function to perform polynomial interpolation between entries of said look-up table.

19. The method of claim 15, wherein said processor comprises a vector processor.

20. The method of claim 15, wherein said input value, x, comprises a vector and wherein said output comprises a vector.