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COMMUNICATION OF DEVICE PRESENCE BETWEEN BOOT ROUTINE AND OPERATING SYSTEM

  • US 20140089551A1
  • Filed: 09/26/2012
  • Published: 03/27/2014
  • Est. Priority Date: 09/26/2012
  • Status: Active Grant
First Claim
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1. An apparatus comprising:

  • a first processor circuit; and

    a first storage communicatively coupled to the first processor circuit and arranged to store a first sequence of instructions operative on the first processor circuit to;

    create a device table comprising multiple device blocks, each device block corresponding to one of multiple hardware devices accessible to the first processor circuit, the device blocks arranged in an order within the device table indicative of relative positions of the hardware devices in a hierarchy of buses and at least one bridge device of the multiple hardware devices;

    enable access to the device table by an operating system; and

    execute a second sequence of instructions of the operating system operative on the processor circuit to access the device table.

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