CLAMPING OF DYNAMIC CAPACITANCE FOR GRAPHICS
First Claim
1. A processor comprising:
- logic to determine utilization values for a plurality of subsystems of a graphics logic;
logic to determine a first capacitance value based on the determined utilization values; and
logic to cause modification to a second capacitance value, corresponding to the graphics logic, based on the first capacitance value and a second capacitance value.
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Accused Products
Abstract
Methods and apparatus relating to clamping or reducing of dynamic capacitance for graphics logic are described. In one embodiment, utilization values for a plurality of subsystems of a graphics logic are determined and a first capacitance value is in turn determined based on (e.g., a sum of products of) the determined utilization values (e.g., and one or more capacitance weight values). A second capacitance value (e.g., corresponding to a maximum dynamic capacitance or Cdyn_max corresponding to the graphics logic) is modified based on (e.g., a comparison of the first capacitance value and a (e.g., threshold) capacitance value. Other embodiments are also disclosed and claimed.
19 Citations
30 Claims
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1. A processor comprising:
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logic to determine utilization values for a plurality of subsystems of a graphics logic; logic to determine a first capacitance value based on the determined utilization values; and logic to cause modification to a second capacitance value, corresponding to the graphics logic, based on the first capacitance value and a second capacitance value. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15)
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16. A method comprising:
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determining utilization values for a plurality of subsystems of a graphics logic; determining a first capacitance value based on the determined utilization values; and causing modification to a second capacitance value, corresponding to the graphics logic, based on the first capacitance value and a second capacitance value. - View Dependent Claims (17, 18)
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19. A system comprising:
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a processor having one or more processor cores; memory to store data, corresponding to at least one frame of a scene, to be accessed by at least one of the one or more processor cores; a display device to present the at least one frame of the scene; the processor comprising; logic to determine utilization values for a plurality of subsystems of a graphics logic; logic to determine a first capacitance value based on the determined utilization values; and logic to cause modification to a second capacitance value, corresponding to the graphics logic, based on the first capacitance value and a second capacitance value. - View Dependent Claims (20, 21, 22)
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23. A computer-readable medium comprising one or more instructions that when executed on a processor configure the processor to perform one or more operations to:
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determine utilization values for a plurality of subsystems of a graphics logic; determine a first capacitance value based on the determined utilization values; and cause modification to a second capacitance value, corresponding to the graphics logic, based on the first capacitance value and a second capacitance value. - View Dependent Claims (24, 25, 26, 27, 28, 29, 30)
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Specification