MULTILEVEL CONVERTER CIRCUIT

• US 20140098587A1
• Filed: 12/09/2013
• Published: 04/10/2014
• Est. Priority Date: 07/05/2011
• Status: Active Grant

• Current Assignee: Fuji Electric Company Limited (Fuji Electric Systems Company Limited)
• Original Assignee: Fuji Electric Company Limited (Fuji Electric Systems Company Limited)
• Inventors: YATSU, Makoto
• Granted Patent: US 9,479,080 B2
• Time in Patent Office: Days
• US Class Current: 363/131
• CPC Class Codes: H02M 1/36 Means for starting or stopping converters
• CPC Class Codes: H02M 7/483 Converters with outputs that each can have more than two voltages levels
• CPC Class Codes: H02M 7/487 Neutral point clamped inverters
• CPC Class Codes: H02M 7/537 using semiconductor devices only, e.g. single switched pulse inverters

Abstract

In some aspects of the invention, a number of semiconductor switches through which output current passes can be reduced between a direct current power source side, which is an input, and an alternating current output, thus achieving loss reduction, and enabling higher efficiency, price reduction, and miniaturization of a device. In some aspects, a direct current power source, formed of a series connection circuit of single power sources, which has three mutually different voltage levels including zero can be provided with first, second, third, and fourth arm pairs, each configured by connecting two arms formed of semiconductor switches in series, an alternating current switch configured by combining semiconductor switches. As such, a plurality of voltage levels can be to be selected from and output by an on and off control of these switch elements.

Claims

1. A multilevel converter circuit which generates a plurality of voltage levels from a direct current power source divided into two, including three terminals, and having three mutually different voltage levels including zero, and selects from and outputs the plurality of voltage levels, comprising:

first, second, third, and fourth arm pairs, each configured by connecting two arms formed of semiconductor switches in series; and

a first alternating current switch configured by combining semiconductor switches, the multilevel converter circuit being characterized in that

the respective outer side terminals of the first arm pair, second arm pair, and third arm pair are connected in series, in order from a first direct current terminal, between the first direct current terminal wherein the potential of the direct current power source is highest and a third direct current terminal wherein the potential is lowest,

the outer side terminals of the fourth arm pair are connected between the midpoint terminal of the first arm pair and the midpoint terminal of the third arm pair,

both ends of the first alternating current switch are connected between the midpoint terminal of the fourth arm pair and a second direct current terminal wherein the potential of the direct current power source is intermediate,

both ends of each of a first capacitor and second capacitor are connected in parallel to both ends of each of the second arm pair and fourth arm pair respectively, and

the midpoint terminal of the second arm pair is formed as an alternating current terminal.

2. The multilevel converter circuit according to claim 1, wherein

both ends of a second alternating current switch are connected between the midpoint terminal of the fourth arm pair and the midpoint terminal of the second arm pair.

3. The multilevel converter circuit according to claim 1, wherein

a fifth arm pair is connected between the outer side terminals of the second arm pair, and

both ends of the second alternating current switch are connected between the midpoint terminal of the fifth arm pair and the midpoint terminal of the fourth arm pair.

4. The multilevel converter circuit according to claim 3, wherein

both ends of a third alternating current switch are connected between the midpoint terminal of the fifth arm pair and the midpoint terminal of the second arm pair.

6. The multilevel converter circuit according to claim 1, wherein

a high potential side arm configuring the first arm pair, a low potential side arm configuring the third arm pair, and two arms configuring the fourth arm pair are all configured of diodes.

7. The multilevel converter circuit according to claim 3, wherein

the high potential side arm configuring the first arm pair, the low potential side arm configuring the third arm pair, the two arms configuring the fourth arm pair, and two arms configuring either the second arm pair or fifth arm pair are all configured of diodes.

9. The multilevel converter circuit according to claim 1, wherein

each of the alternating current switches is configured by connecting semiconductor switches having reverse breakdown voltage characteristics in anti-parallel.

10. The multilevel converter circuit according to claim 1, wherein

each of the high potential side arm configuring the first arm pair and the low potential side arm configuring the third arm pair is configured of a series connection circuit of a plurality of semiconductor switches having the same function, and

semiconductor switches configuring each arm are controlled by their respective individual control signals.

12. The multilevel converter circuit according to claim 1, wherein

the voltage levels of the three terminals of the direct current power source are set to +3E, 0, and −

3E, and the levels of the voltages of the first capacitor and second capacitor are maintained at 1E and 2E respectively, and that

a total of seven levels of voltages, +3E, +2E, 1E, 0, −

1E, −

2E, and −

3E, are generated using the respective voltages of the direct current power source, first capacitor, and second capacitor, thus enabling an optional selection from and output of the voltage levels.

13. The multilevel converter circuit according to claim 1, wherein

the voltage levels of the three terminals of the direct current power source are set to +4E, 0, and −

4E, and the levels of the voltages of the first capacitor and second capacitor are maintained at 1E and 2E respectively, and that

a total of nine levels of voltages, +4E, +3E, +2E, 1E, 0, −

1E, −

2E, −

3E, and −

4E, are generated using the respective voltages of the direct current power source, first capacitor, and second capacitor, thus enabling an optional selection from and output of the voltage levels.

5. A multilevel converter circuit which generates a plurality of voltage levels from a direct current power source divided into two, including three terminals, and having three mutually different voltage levels including zero, and selects from and outputs the plurality of voltage levels, comprising:

first, second, and third arm pairs, each configured by connecting two arms formed of semiconductor switches in series; and

first, second, and third alternating current switches, each configured by combining semiconductor switches, the multilevel converter circuit being characterized in that

the respective outer side terminals of the first arm pair and second arm pair are connected in series, in order from a first direct current terminal, between the first direct current terminal wherein the potential of the direct current power source is highest and a third direct current terminal wherein the potential is lowest,

the outer side terminals of the third arm pair are connected between the midpoint terminal of the first arm pair and the midpoint terminal of the second arm pair,

both ends of the first alternating current switch are connected between the midpoint terminal of the third arm pair and a second direct current terminal wherein the potential of the direct current power source is intermediate,

the outer side terminals of a connection circuit wherein two capacitors are connected in series are connected in parallel to the outer side terminals of the third arm pair,

both ends of the second alternating current switch is connected between the midpoint terminal of the capacitor series connection circuit and the midpoint terminal of the third arm pair,

both ends of the third alternating current switch are connected between the midpoint terminal of the capacitor series connection circuit and the connecting point of the first arm pair and second arm pair, and

the connecting point of the first arm pair, second arm pair, and third alternating current switch is formed as an alternating current terminal.

8. The multilevel converter circuit according to claim 5, wherein

the high potential side arm configuring the first arm pair, a low potential side arm configuring the second arm pair, and two arms configuring the third arm pair are all configured of diodes.

11. The multilevel converter circuit according to claim 5, wherein

each of the high potential side arm configuring the first arm pair and the low potential side arm configuring the second arm pair is configured of a series connection circuit of a plurality of semiconductor switches having the same function, and

semiconductor switches configuring each arm are controlled by their respective individual control signals.

14. The multilevel converter circuit according to claim 5, wherein

the voltage levels of the three terminals of the direct current power source are set to +3E, 0, and −

3E, and

a total of seven levels of voltages, +3E, +2E, 1E, 0, −

1E, −

2E, and −

3E, are generated using the respective voltages of the direct current power source and two capacitors, thus enabling an optional selection from and output of the voltage levels.