SYSTEMS AND METHODS FOR NONVOLATILE MEMORY PERFORMANCE THROTTLING
First Claim
Patent Images
1. A method for maximizing data retention in a memory system, the method comprising:
- receiving temperature information and cycle count data associated with a portion of a nonvolatile memory (“
NVM”
) of the memory system from a memory of the memory system;
determining a maximum temperature for storing data in the portion of the NVM to meet a predetermined data retention target based on the retrieved temperature information and the cycle count data; and
throttling the performance of the memory system based at least in part on to the determining.
1 Assignment
0 Petitions
Accused Products
Abstract
Systems and methods for nonvolatile memory (“NVM”) performance throttling are disclosed. Performance of an NVM system may be throttled to achieve particular data retention requirements. In particular, because higher storage temperatures tend to reduce the amount of time that data may be reliably stored in an NVM system, performance of the NVM system may be throttled to reduce system temperatures and increase data retention time.
139 Citations
19 Claims
-
1. A method for maximizing data retention in a memory system, the method comprising:
-
receiving temperature information and cycle count data associated with a portion of a nonvolatile memory (“
NVM”
) of the memory system from a memory of the memory system;determining a maximum temperature for storing data in the portion of the NVM to meet a predetermined data retention target based on the retrieved temperature information and the cycle count data; and throttling the performance of the memory system based at least in part on to the determining. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
-
-
11. A nonvolatile memory (“
- NVM”
) system, comprising;a memory controller; a plurality of NVM dies comprising NVM and communicatively coupled to the memory controller over a first bus; and at least one temperature sensor configured to measure a temperature of the plurality of NVM dies, wherein the memory controller is configured to throttle NVM performance by deactivating a first subset of the plurality of NVM dies based on at least one of; the temperature of the plurality of NVM dies; a cycle count of a portion of the NVM; and a time elapsed since the portion of the NVM was last programmed. - View Dependent Claims (12, 13, 14, 15, 16, 17, 18, 19)
- NVM”
Specification