SYSTEM AND METHOD FOR AUTOMATED FAILURE DETECTION OF HOLD-UP POWER STORAGE DEVICES

• US 20140103955A1
• Filed: 10/11/2012
• Published: 04/17/2014
• Est. Priority Date: 10/11/2012
• Status: Active Grant

• Current Assignee: Hamilton Sundstrand Corporation (Raytheon Technologies Corporation d/b/a RTX)
• Original Assignee: Hamilton Sundstrand Corporation (Raytheon Technologies Corporation d/b/a RTX)
• Inventors: Avritch, Steven A., Reen, Kanwalpreet
• Granted Patent: US 9,007,087 B2
• Time in Patent Office: Days
• US Class Current: 324/764.01
• CPC Class Codes: G01R 27/2605 Measuring capacitance capacitive sensors G01D5/24
• CPC Class Codes: G01R 31/64 Testing of capacitors

Abstract

A fault detection circuit is utilized to automatically detect faults in hold-up power storage devices. The fault detection circuit includes a hold-up monitoring circuit and a memory device. The hold-up monitoring circuit is connected to monitor output of the hold-up power storage device, wherein the hold-up monitoring circuit measures a duration of time that the hold-up power storage device provides sufficient power following a loss of normal power and detects faults based on the measured duration of time. The memory device is connected to store the duration of time measured by the hold-up power storage device following a loss of normal power

Claims

1. A fault detection circuit for detecting faults in a hold-up power storage device, the fault detection circuit comprising:

a hold-up monitoring circuit connected to monitor output of the hold-up power storage device, wherein the hold-up monitoring circuit measures a duration of time that the hold-up power storage device provides sufficient power following a loss of normal power and detects faults based on the measured duration of time; and

a memory device connected to store the measured duration of time that the hold-up power storage device provides sufficient power following a loss of normal power.

2. The fault detection circuit of claim 1, wherein the memory device stores a plurality of timer values provided in response to successive losses of system power.

3. The fault detection circuit of claim 1, further including:

a timer for measuring the duration of time that the hold-up power storage device provides sufficient power following a loss of normal power, wherein the hold-up monitoring circuit starts the timer in response to a detected loss of normal power and stops the timer when the monitored output of the hold-up power storage device falls below a threshold value.

4. The fault detection circuit of claim 3, wherein the threshold value used to stop the timer is selected to allow the hold-up monitoring circuit sufficient time to store the timer value before the hold-up power storage device is completely depleted.

5. The fault detection circuit of claim 4, wherein the fault detection circuit generates a fault detected signal if the timer value is less than a timer threshold value.

6. The fault detection circuit of claim 5, wherein the hold-up monitoring circuit generates outputs that include the timer value and a fault detected signal.

7. The fault detection circuit of claim 1, wherein the hold-up monitoring circuit monitors the system power and compares the monitored system power to a threshold to detect a loss of system power.

8. The fault detection circuit of claim 1, wherein the hold-up monitoring circuit receives an input from an external circuit indicating a detected loss of system power.

9. A method of detecting faults in a hold-up power storage device, the method comprising:

detecting a loss of system power;

starting a timer in response to the detected loss of system power;

monitoring power supplied by the hold-up power storage device;

stopping the timer in response to the monitored power supplied by the hold-up power storage device decreasing below a threshold value; and

detecting a fault in the hold-up power storage device based on a duration of the timer value.

10. The method of claim 9, wherein detecting a loss of system power includes monitoring the system power and comparing the monitored system power to a threshold value to detect a loss of system power.

11. The method of claim 9, wherein detecting a fault in the hold-up power storage device includes comparing the duration of the timer value to a timer threshold value, wherein if the duration of the timer value is less than the timer threshold value then a fault is detected.

12. The method of claim 9, further includes storing the timer duration value to memory.

13. A power supply system comprising:

a power supply circuit connected to receive system power at an input and to provide power at one or more outputs;

a hold-up power storage device that receives charging power from an output of the power supply circuit during normal operation and provides power to the input of the power supply circuit in response to a loss of system power input;

a power monitor circuit that monitors the system power and selectively connects the hold-up power storage device to the input of the power supply circuit in response to a detected loss of system power; and

a fault detection circuit that monitors a duration of time the hold-up power storage device supplies power following a detected loss of system power, wherein a fault condition associated with the hold-up power storage device is detected if the monitored duration of time is less than a threshold value.

14. The power supply system of claim 13, wherein the fault detection circuit includes a timer for measuring the duration of time the hold-up power storage device supplies power.

15. The power supply system of claim 14, wherein the fault detection circuit includes a hold-up monitoring circuit that receives an input from the power monitor circuit indicating a loss of system power.

16. The power supply system of claim 15, wherein the hold-up monitoring circuit circuit starts the timer in response to a detected loss of system power and stops the timer in response to power supplied by the hold-up power storage device falling below a threshold value.

17. The power supply system of claim 15, wherein the hold-up monitoring circuit provides outputs that include the measured timer value and an indication of a detected fault condition.

18. The power supply system of claim 15, further including:

a memory for storing one or more timer values measured by the fault detection circuit.