SUPPLEMENTAL POWER SYSTEM FOR POWER EXCURSIONS

• US 20140108846A1
• Filed: 10/15/2012
• Published: 04/17/2014
• Est. Priority Date: 10/15/2012
• Status: Abandoned Application

• Current Assignee: Dell Products LP (Dell Technologies Inc.)
• Original Assignee: Dell Products LP (Dell Technologies Inc.)
• Inventors: Berke, Stuart Allen, Richards, George G. III, Muccini, Mark
• Application Number:
  US13/651,903
• Publication Number:
  US 20140108846A1
• Time in Patent Office: Days
• US Class Current: 713/340
• CPC Class Codes: G06F 1/263 Arrangements for using multiple switchable power supplies, e.g. battery and AC G06F1/30 takes precedence
• CPC Class Codes: G06F 1/28 Supervision thereof, e.g. detecting power-supply failure by out of limits supervision
• CPC Class Codes: G06F 13/4221 being an input/output bus, e.g. ISA bus, EISA bus, PCI bus, SCSI bus
• CPC Class Codes: Y02D 10/00 Energy efficient computing, e.g. low power processors, power management or thermal management

Abstract

A supplemental power system for IHS power excursions includes a processor and a memory coupled to the processor. A power system is coupled to the processor and a plurality of power supply paths. A first power supply path is operable to supply power at a first voltage from the power system to the processor. A second power supply path is operable to store power from the power system at a second voltage that is greater than the first voltage, and the second power supply path is further operable to supply the power stored at the second voltage to the processor during power excursions by the processor. In some embodiments, the second power supply path may include a boost converter to increase power at the first voltage to the second voltage, or may receive power output at the second voltage from a supplemental power rail in the power system.

Claims

1. A supplemental power system, comprising:

at least one powered component;

a power system;

a first power supply path that is operable to supply power at a first voltage from the power system to the at least one powered component; and

a second power supply path that is operable to store power from the power system at a second voltage that is greater than the first voltage, wherein the second power supply path is further operable to supply the power stored at the second voltage to the at least one powered component during power excursions by the at least one powered component.

2. The system of claim 1, wherein the second power supply path includes a boost converter that is operable to receive power at the first voltage from the power system and increase that power to the second voltage, and a storage device that is operable to store the power at the second voltage.

3. The system of claim 2, wherein the second power supply path includes a buck converter that is operable to receive the power at the second voltage from the storage device, decrease that power to the first voltage, and provide the power at the first voltage to the at least one powered component during power excursions by the at least one powered component.

4. The system of claim 3, wherein the buck converter includes a bandwidth that is greater than a bandwidth of the power system such that the second power supply path supplies power to the at least one powered component during power excursions by the at least one powered component.

5. The system of claim 1, wherein the power system includes a supplemental power rail that is operable to output the power at the second voltage, and wherein the second power supply path includes a storage device that is operable to store the power at the second voltage from the supplemental power rail.

6. The system of claim 5, wherein the second power supply path includes a voltage regulator that is operable to receive the power at the second voltage from the storage device, decrease that power to the first voltage, and provide the power at the first voltage to the at least one powered component during power excursions by the at least one powered component.

7. The system of claim 5, wherein the supplemental power rail is a standby power rail.

8. An information handling system (IHS), comprising:

a processor;

a memory coupled to the processor;

a power system coupled to the processor;

a first power supply path that is operable to supply power at a first voltage from the power system to the processor; and

a second power supply path that is operable to store power from the power system at a second voltage that is greater than the first voltage, wherein the second power supply path is further operable to supply the power stored at the second voltage to the processor during power excursions by the processor.

9. The IHS of claim 8, wherein the second power supply path includes a boost converter that is operable to receive power at the first voltage from the power system and increase that power to the second voltage, and a storage device that is operable to store the power at the second voltage.

10. The IHS of claim 9, wherein the second power supply path includes a buck converter that is operable to receive the power at the second voltage from the storage device, decrease that power to the first voltage, and provide the power at the first voltage to the processor during power excursions by the processor.

11. The IHS of claim 10, wherein the buck converter includes a bandwidth that is greater than a bandwidth of the power system such that the second power supply path supplies power to the processor during power excursions by the processor.

12. The IHS of claim 8, wherein the power system includes a supplemental power rail that is operable to output the power at the second voltage, and wherein the second power supply path includes a storage device that is operable to store the power at the second voltage from the supplemental power rail.

13. The IHS of claim 12, wherein the second power supply path includes a voltage regulator that is operable to receive the power at the second voltage from the storage device, decrease that power to the first voltage, and provide the power at the first voltage to the processor during power excursions by the processor.

14. The IHS of claim 12, wherein the supplemental power rail is an IHS standby mode power rail.

15. A method for providing supplemental power, comprising:

providing power at a first voltage from a power system to a processor over a first power supply path;

storing power from the power system at a second voltage on a second power supply path, wherein the second voltage is greater than the first voltage;

monitoring for a power excursion by the processor; and

in response to detecting the power excursion by the processor, providing the power that is stored at the second voltage on the second power supply path to the processor.

16. The method of claim 15, further comprising:

receiving power at the first voltage from the power system and increasing that power to the second voltage in the second power supply path; and

storing the power at the second voltage in the second power supply path.

17. The method of claim 16, further comprising:

receiving the power stored at the second voltage and decreasing that power to the first voltage in the second power supply path; and

providing the power at the first voltage to the processor during power excursions by the processor over the second power supply path.

18. The method of claim 17, wherein the decreasing the power to the first voltage after receiving that power stored at the second voltage is performed by a buck converter having bandwidth that is greater than a bandwidth of the power system such that the second power supply path supplies power to the processor during power excursions by the processor.

19. The method of claim 15, further comprising:

outputting the power at the second voltage using a supplemental power rail of the power system; and

storing the power at the second voltage from the supplemental power rail in the second power supply path.

20. The method of claim 19, further comprising:

receiving the power stored at the second voltage and decreasing that power to the first voltage in the second power supply path; and

providing the power at the first voltage to the processor during power excursions by the processor over the second power supply path.