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Fan-Out Wafer Level Package Structure

  • US 20140110856A1
  • Filed: 10/19/2012
  • Published: 04/24/2014
  • Est. Priority Date: 10/19/2012
  • Status: Active Grant
First Claim
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1. A method for forming a package structure, comprising:

  • applying a die over a carrier, the die having a plurality of mounts;

    providing one or more vias on the carrier;

    forming a molded substrate over the carrier and around the vias;

    reducing a first side of the molded substrate opposite the carrier and exposing the one or more vias at a first side of the molded substrate opposite the carrier;

    forming a redistribution layer (RDL) on the first side of the molded substrate, the RDL having a plurality of RDL contact pads; and

    exposing the one or more vias at a second side of the molded substrate opposite the first side.

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