LOW DROP-OUT REGULATOR

• US 20140111173A1
• Filed: 01/14/2013
• Published: 04/24/2014
• Est. Priority Date: 10/18/2012
• Status: Abandoned Application

• Current Assignee: Samsung Electro-Mechanics Co., Ltd. (Samsung Group)
• Original Assignee: Samsung Electro-Mechanics Co., Ltd. (Samsung Group)
• Inventors: LEE, Soo Woong
• Application Number:
  US13/740,751
• Publication Number:
  US 20140111173A1
• Time in Patent Office: Days
• US Class Current: 323/281
• CPC Class Codes: G05F 1/565 sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor G05F1/563 takes precedence

Abstract

There is provided a low drop-out regulator. The low drop-out regulator includes a reference voltage generating unit converting input power to generate a reference voltage; an amplifier comparing the reference voltage and a feedback voltage to output a gate signal; a pass transistor array unit including a first transistor and a second transistor respectively including a gate receiving the gate signal; a voltage detector detecting the feedback voltage and an output voltage by using a switching operation of the pass transistor array unit; and a controller shutting off the gate signal applied to either of the first transistor or the second transistor, according to the reference voltage and the input power.

Claims

1. A low drop-out regulator, comprising:

a reference voltage generating unit converting input power to generate a reference voltage;

an amplifier comparing the reference voltage and a feedback voltage to output a gate signal;

a pass transistor array unit including a first transistor and a second transistor respectively including a gate receiving the gate signal;

a voltage detector detecting the feedback voltage and an output voltage by using a switching operation of the pass transistor array unit; and

a controller shutting off the gate signal applied to either of the first transistor or the second transistor, according to the reference voltage and the input power.

2. The low drop-out regulator of claim 1, wherein the first transistor and the second transistor respectively include a p-type metal oxide semiconductor field effect transistor (P-MOSFET) including a source connected to the input power, and a drain connected to the voltage detector.

3. The low drop-out regulator of claim 1, wherein the pass transistor array unit further includes a first switch connecting agate of the first transistor and an output terminal of the amplifier;

and a second switch connecting a gate of the second transistor and an output terminal of the amplifier.

4. The low drop-out regulator of claim 1, wherein the controller generates a first signal by comparing the reference voltage and the input power, and a second signal obtained by inverting the first signal.

5. The low drop-out regulator of claim 4, wherein the controller includes a comparer comparing the reference voltage and the input power to output the first signal;

and an inverter inverting the first signal to output the second signal.

6. The low drop-out regulator of claim 4, wherein the comparer includes an inverting terminal to which the reference voltage is input;

a non-inverting terminal to which the input power is input; and

an output terminal outputting the first signal.

7. The low drop-out regulator of claim 3, wherein the controller generates a first signal by comparing the reference voltage and the input power, and a second signal obtained by inverting the first signal, and the first signal and the second signal are transmitted to different respective switches from among the first switch and the second switch.

8. The low drop-out regulator of claim 7, wherein the first switch and the second switch perform switching operations according to different on/off timings.

9. The low drop-out regulator of claim 1, wherein the voltage detector includes a first resistor having one end connected to the pass transistor array unit;

and a second resistor including one end connected to the other end of the first resistor, and the other end connected to a ground.

10. The low drop-out regulator of claim 9, wherein the voltage detector detects the feedback voltage according to a resistance ratio of the first resistor and the second resistor and detects the output voltage according to total resistance of the first resistor and the second resistor.

14. The low drop-out regulator of claim 10, wherein the controller includes a comparer comparing the reference voltage and the input power to output the first signal;

and an inverter inverting the first signal to output the second signal.

15. The low drop-out regulator of claim 14, wherein the comparer includes an inverting terminal to which the reference voltage is input;

a non-inverting terminal to which the input power is input; and

an output terminal outputting the first signal.

11. A low drop-out regulator, comprising:

a reference voltage generating unit converting input power to generate a reference voltage;

an amplifier comparing the reference voltage and a feedback voltage to output a gate signal;

a pass transistor array unit including a first switch having one end connected to an output terminal of the amplifier, a second switch having one end connected to the output terminal of the amplifier, a first transistor having a gate connected to the other end of the first switch, a second transistor having a gate connected to the other end of the second switch, a third switch connecting the first switch, a connecting node of the first transistor and an input terminal of the input power to one another, and a fourth switch connecting the second switch, a connecting node of the second transistor and the input terminal of the input power to one another;

a voltage detector detecting the feedback voltage and an output voltage by using a switching operation of the pass transistor array unit; and

a controller controlling switching operations of the first switch, the second switch, the third switch, and the fourth switch according to the reference voltage and the input power.

12. The low drop-out regulator of claim 11, wherein the first transistor and the second transistor respectively include a P-MOSFET including a source connected to the input power, and a drain connected to the voltage detector.

13. The low drop-out regulator of claim 11, wherein the controller generates a first signal by comparing the reference voltage and the input power, and a second signal obtained by inverting the first signal.

16. The low drop-out regulator of claim 12, wherein the controller generates a first signal by comparing the reference voltage and the input power, and a second signal obtained by inverting the first signal, and the first signal and the second signal are transmitted to different respective switching units from among a first switching unit including the first switch and the fourth switch and a second switching unit including the second switch and the third switch.

17. The low drop-out regulator of claim 12, wherein the first switch and the second switch perform switching operations according to different on/off timings, and the third switch and the fourth switch perform switching operations according to different on/off timings.

18. The low drop-out regulator of claim 11, wherein the voltage detector includes a first resistor having one end connected to the pass transistor array unit;

and a second resistor including one end connected to the other end of the first resistor, and the other end connected to a ground.

19. The low drop-out regulator of claim 17, wherein the voltage detector detects the feedback voltage according to a resistance ratio of the first resistor and the second resistor and detects the output voltage according to total resistance of the first resistor and the second resistor.