TRANSMISSION INTERFACE AND SYSTEM USING THE SAME

• US 20140111360A1
• Filed: 12/31/2013
• Published: 04/24/2014
• Est. Priority Date: 08/12/2010
• Status: Active Grant

• Current Assignee: MediaTek, Inc.
• Original Assignee: MediaTek, Inc.
• Inventors: GU, Wei-Cheng, TSAI, Chung-Hung, LI, Chun-Nan, CHEN, Yi-Hsi
• Granted Patent: US 9,112,520 B2
• Time in Patent Office: Days
• US Class Current: 341/100
• CPC Class Codes: G06F 13/00 Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units interface circuits for specific input/output devices G06F3/00 ; multiprogram control therefor G06F9/46; multiprocessor systems G06F15/16
• CPC Class Codes: G09G 2370/10 Use of a protocol of communication by packets in interfaces along the display data pipeline
• CPC Class Codes: G09G 5/006 Details of the interface to the display terminal specific for a display terminal using a CRT G09G1/167; using a flat panel G09G3/2096; circuits for interfacing with colour displays G09G5/04
• CPC Class Codes: H03M 9/00 Parallel/series conversion or vice versa digital stores in which the information is moved stepwise per se G11C19/00
• CPC Class Codes: H04L 7/0008 Synchronisation information channels, e.g. clock distribution lines
• CPC Class Codes: H04N 21/43632 involving a wired protocol, e.g. IEEE 1394 high-speed IEEE 1394 serial bus H04L12/40052
• CPC Class Codes: H04N 25/745 Circuitry for generating timing or clock signals
• CPC Class Codes: H04N 25/766 comprising control or output lines used for a plurality of functions, e.g. for pixel output, driving, reset or power
• CPC Class Codes: H04N 5/04 Synchronising for television systems using pulse code modulation H04N7/56

Abstract

A transmission interface includes a first pin, a second pin, a conversion unit, and a decoding unit. The conversion unit receives a serial input data stream via the first pin and receives a serial clock via the second pin. The conversion unit converts the serial input data stream to parallel input data and converts the serial clock to a parallel clock. The serial input data stream has a full swing form. The decoding unit receives and decodes the parallel input data and generates an input data signal according to the decoded parallel input data.

Claims

1. A transmission interface, being applied in a display system, comprising:

a first pin and a second pin;

a conversion unit for receiving a first serial input data stream via the first pin, receiving a serial clock via the second pin, converting the first serial input data stream to parallel input data, and converting the serial clock to a parallel clock, wherein each of the first serial input data stream and the first serial clock has a full swing form, and analog circuits dealing with differential signals are omitted in the transmission interface; and

a decoding unit for receiving and decoding the parallel input data and generating an input data signal according to the decoded parallel input data.

2. The transmission interface as claimed in claim 1, wherein the first serial input data stream is transmitted from a transmission device at double data rate.

3. The transmission interface as claimed in claim 1, wherein the conversion unit further receives a serial synchronization data stream, which has the full swing form and is merged with the first serial input data stream, via the first pin and converts the serial synchronization data stream to parallel synchronization data.

4. The transmission interface as claimed in claim 3, wherein the decoding unit further receives and decodes the parallel synchronization data and generates a first synchronization signal and a second synchronization signal according to the decoded parallel synchronization data and the parallel clock.

5. The transmission interface as claimed in claim 1 further comprising:

a third pin for receiving a digital power; and

a fourth pin coupled to a ground.

6. The transmission interface as claimed in claim 5 further comprising a fifth pin for receiving a second serial input data stream.

7. The transmission interface as claimed in claim 5 further comprising:

a fifth pin for receiving a second serial input data stream;

a sixth pin for receiving a third serial input data stream; and

a seventh pin for receiving a fourth serial input data stream.

8. The transmission interface as claimed in claim 1, wherein the display system comprises a transmission device.

9. The transmission interface as claimed in claim 8, wherein the transmission device is a display controller.

10. The transmission interface as claimed in claim 1, wherein the display system comprises a processing device.

11. The transmission interface as claimed in claim 10, wherein the processing device is a driver IC of a display module.

12. A transmission device for generating a first serial input data stream and a serial clock, the first serial input data stream and the serial clock are received by a transmission interface, wherein each of the first serial input data stream and the serial clock has a full swing form.

13. The transmission device as claimed in claim 12, wherein the first serial input data stream is transmitted from the transmission device at double data rate.

14. The transmission device as claimed in claim 12, wherein the transmission device is a display controller.

15. The transmission device as claimed in claim 12, wherein the transmission interface comprising:

a first pin and a second pin;

a conversion unit for receiving the first serial input data stream via the first pin, receiving the serial clock via the second pin, converting the first serial input data stream to parallel input data, and converting the serial clock to a parallel clock, wherein analog circuits dealing with differential signals are omitted in the transmission interface; and

a decoding unit for receiving and decoding the parallel input data and generating an input data signal according to the decoded parallel input data.

16. The transmission device as claimed in claim 15, wherein the conversion unit of the transmission interface further receives a serial synchronization data stream, which has the full swing form and is merged with the first serial input data stream, via the first pin and converts the serial synchronization data stream to parallel synchronization data.

17. The transmission device as claimed in claim 16, wherein the decoding unit of the transmission interface further receives and decodes the parallel synchronization data and generates a first synchronization signal and a second synchronization signal according to the decoded parallel synchronization data and the parallel clock.

18. The transmission device as claimed in claim 15, wherein the transmission interface further comprising:

a third pin for receiving a digital power; and

a fourth pin coupled to a ground.

19. The transmission device as claimed in claim 18, wherein the transmission interface further comprising a fifth pin for receiving a second serial input data stream.

20. The transmission device as claimed in claim 18, wherein the transmission interface further comprising:

a fifth pin for receiving a second serial input data stream;

a sixth pin for receiving a third serial input data stream; and

a seventh pin for receiving a fourth serial input data stream.