PIXEL, STEREOSCOPIC IMAGE DISPLAY DEVICE, AND DRIVING METHOD THEREOF

• US 20140111563A1
• Filed: 02/12/2013
• Published: 04/24/2014
• Est. Priority Date: 10/19/2012
• Status: Active Grant

• Current Assignee: Samsung Display Company Limited (Samsung Electronics Co. Ltd.)
• Original Assignee: Samsung Display Company Limited (Samsung Electronics Co. Ltd.)
• Inventors: Hwang, Young-In, Lee, Hae-Yeon
• Granted Patent: US 9,489,875 B2
• Time in Patent Office: Days
• US Class Current: 345/691
• CPC Class Codes: G09G 2300/0819 used for counteracting undesired variations, e.g. feedback or autozeroing
• CPC Class Codes: G09G 2300/0852 being a dynamic memory with more than one capacitor
• CPC Class Codes: G09G 2300/0861 with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes
• CPC Class Codes: G09G 2300/0866 by means of changes in the pixel supply voltage
• CPC Class Codes: G09G 2310/0251 Precharge or discharge of pixel before applying new pixel voltage
• CPC Class Codes: G09G 2310/063 Waveforms for resetting the whole screen at once
• CPC Class Codes: G09G 2320/0209 Crosstalk reduction, i.e. to reduce direct or indirect influences of signals directed to a certain pixel of the displayed image on other pixels of said image, inclusive of influences affecting pixels in different frames or fields or sub-images which constitute a same image, e.g. left and right images of a stereoscopic display
• CPC Class Codes: G09G 2320/043 Preventing or counteracting the effects of ageing
• CPC Class Codes: G09G 3/003 to produce spatial visual effects
• CPC Class Codes: G09G 3/2022 using sub-frames
• CPC Class Codes: G09G 3/3233 with pixel circuitry controlling the current through the light-emitting element
• CPC Class Codes: H04N 13/341 using temporal multiplexing
• CPC Class Codes: H04N 13/398 Synchronisation thereof; Control thereof

Abstract

A stereoscopic image display device includes a display panel including a plurality of pixels, a scan driver, a gate driver, a data driver, and a controller, and a sub-frame includes a first period during which a data voltage according to an image data signal emitted in the previous sub-frame is initialized, a second period during which a data voltage according to the image data signal written in the previous sub-frame is transmitted and a threshold voltage of a driving transistor of each pixel is compensated, a third period during which a data voltage according to a next sub-frame'"'"'s data signal is sequentially written to the respective pixels, and a fourth period that is concurrent with and equal to or longer than the third period and during which the respective pixels concurrently emit light corresponding to the data voltage according to the image data signal written in the previous sub-frame.

Claims

1. A stereoscopic image display device comprising:

a display panel comprising a plurality of pixels configured to emit light according to stored data voltages during corresponding sub-frames of a corresponding frame;

a scan driver for transmitting scan signals to the pixels;

a gate driver for transmitting an initialization control signal, a compensation control signal, and an emission control signal to the pixels;

a data driver for transmitting first image data signals and second image data signals, which correspond to a different view point from that of the first image data signals, to the pixels; and

a controller for controlling operation of the scan driver, the gate driver, and the data driver, and for generating and transmitting the first image data signals and the second image data signals according to an external image signal,

wherein the corresponding sub-frames comprise a first sub-frame that comprises;

a first period for initializing the stored data voltages of the pixels that correspond to third image data signals transmitted in a previous sub-frame of a previous frame to an initialization voltage;

a second period for changing the stored data voltages of the pixels to correspond to the first image data signals written in the previous sub-frame for light emission in the first sub-frame and for compensating a threshold voltage of a driving transistor of each pixel;

a third period for sequentially writing second data voltages, which correspond to the second image data signals of a second sub-frame of the corresponding frame, to the pixels; and

a fourth period, configured to be concurrent with and as long as or longer than the third period, for emitting light from the pixels according to the stored data voltages that correspond to the first data signals.

2. The stereoscopic image display device of claim 1, wherein a view point of the second image data signals and the third image data signals correspond to the same view point, and the view point of the second and third image data signals is different from a view point of the first image data signals.

3. The stereoscopic image display device of claim 1, wherein the first image data signals are left eye image data signals, and the second and third image data signals are right eye image data signals.

4. The stereoscopic image display device of claim 1, wherein each of the pixels is coupled to a scan line for transmitting a corresponding one of the scan signals, an initialization control line for transmitting the initialization control signal, a compensation control line for transmitting the compensation control signal, an emission control line for transmitting the emission control signal, and a data line for transmitting a corresponding one of the first, second, and third image data signals.

5. The stereoscopic image display device of claim 1, wherein the gate driver comprises an initialization driver for generating and transmitting the initialization control signal, a compensation driver for generating and transmitting the compensation control signal, and a light emission driver for generating and transmitting the emission control signal.

6. The stereoscopic image display device of claim 1, further comprising a power supply for supplying a first power voltage and a second power voltage for driving the pixels and an initialization voltage for initializing each of the pixels.

7. The stereoscopic image display device of claim 1, wherein the pixels of the display panel are configured to be concurrently operated during the first, second, and fourth periods, and the pixels of the display panel are configured to be sequentially operated in each pixel line during the third period.

8. The stereoscopic image display device of claim 1, wherein, during the first period, a gate electrode terminal of a driving transistor of each pixel is configured to be applied with an initialization voltage in response to the initialization control signal transmitted to the respective pixels to apply an on-bias voltage to the driving transistor.

9. The stereoscopic image display device of claim 8, wherein the initialization voltage is equivalent to a gate-on voltage of the driving transistor, and current paths passing through the driving transistors to organic light emitting diodes are configured to not be formed during the first period.

10. The stereoscopic image display device of claim 1, wherein, during the second period, written data voltages, which correspond to the first image data signals written to corresponding sustain capacitors of the pixels during the previous sub-frame, are configured to be transmitted to corresponding storage capacitors of the pixels in response to the compensation control signal transmitted to the pixels, and a gate electrode and a drain electrode of the driving transistor of each pixel are configured to be diode-connected in response to the compensation control signal.

11. The stereoscopic image display device of claim 1, wherein, during the third period, the second data voltages, which correspond to the second image data signals, are configured to be stored in corresponding sustain capacitors of the pixels in response to scan signals sequentially transmitted to the pixels along scan lines.

12. The stereoscopic image display device of claim 1, wherein, during the fourth period, organic light emitting diodes of the pixels emit light according to corresponding driving currents that correspond to the stored data voltages, which correspond to the first image data signals, in response to the emission control signal transmitted to the pixels.

13. The stereoscopic image display device of claim 1, wherein the second sub-frame of the corresponding frame comprises:

a fifth period for initializing the stored data voltages of the pixels that correspond to first image data signals transmitted in the first sub-frame of the corresponding frame to the initialization voltage;

a sixth period for changing the stored data voltages of the pixels to correspond to the second image data signals written in the first sub-frame for light emission in the second sub-frame and for compensating the threshold voltage of the driving transistor of each pixel;

a seventh period for sequentially writing to the pixels fourth data voltages that correspond to fourth image data signals of a next sub-frame of a next frame; and

an eighth period, configured to be concurrent with and as long as or longer than the seventh period, for emitting light from the pixels according to the stored data voltages that correspond to the second data signals.

14. A pixel comprising:

an organic light emitting diode;

a first transistor for transmitting a driving current corresponding to a stored data voltage to the organic light emitting diode;

a second transistor for transmitting a data voltage, which corresponds to a data signal having a view point that is different from that of a previous data signal that corresponds to the stored data voltage, in response to a scan signal;

a sustain capacitor for storing the data voltage corresponding to the data signal;

a storage capacitor for storing the stored data voltage, which corresponds to the data voltage then stored by the sustain capacitor, for light emission in a corresponding sub-frame;

a third transistor for applying a reference voltage to a first electrode of the storage capacitor;

a fourth transistor for initializing the stored data voltage with an initialization voltage applied to a second node to which a gate electrode of the first transistor and a second electrode of the storage capacitor are coupled;

a fifth transistor for transmitting the data voltage from the sustain capacitor to the storage capacitor;

a sixth transistor coupled between the gate electrode and a drain electrode of the first transistor for compensating a threshold voltage by diode-connecting the first transistor;

a seventh transistor for applying a driving power voltage of a high level to the first electrode of the storage capacitor while the organic light emitting diode emits light; and

an eight transistor for transmitting the driving current to the organic light emitting diode for light emission while a next sub-frame'"'"'s data voltage is written to the sustain capacitor via the second transistor.

15. The pixel of claim 14, wherein the first transistor comprises the gate electrode coupled to the second electrode of the storage capacitor, a source electrode coupled to a supply source of the driving power voltage, and the drain electrode coupled to a first electrode of the sixth transistor.

16. The pixel of claim 14, wherein the second transistor comprises a gate electrode coupled to a scan line for transmitting the scan signal, a source electrode coupled to a data line for supplying the data signal, and a drain electrode coupled to a source electrode of the fifth transistor.

17. The pixel of claim 14, wherein the sustain capacitor comprises a first electrode coupled to a first node to which a drain electrode of the second transistor and a source electrode of the fifth transistor are commonly coupled, and a second electrode coupled to a supply source of the initialization voltage.

18. The pixel of claim 14, wherein the storage capacitor comprises the first electrode coupled to the second node, to which a drain electrode of each of the fifth, seventh, and third transistors is coupled, and the second electrode coupled to a first node to which the gate electrode of the first transistor, a second electrode of the sixth transistor, and a drain electrode of the fourth transistor are coupled.

19. The pixel of claim 14, wherein the third transistor comprises a gate electrode coupled to an initialization control line for transmitting an initialization control signal, a source electrode coupled to a data line for transmitting the reference voltage, and a drain electrode coupled to the first electrode of the storage capacitor.

20. The pixel of claim 14, wherein the fourth transistor comprises a gate electrode coupled to an initialization control line for transmitting an initialization control signal, a source electrode coupled to a supply source of the initialization voltage, and a drain electrode coupled to the second electrode of the storage capacitor.

21. The pixel of claim 14, wherein the fifth transistor comprises a gate electrode coupled to a compensation control line for transmitting a compensation control signal, a source electrode coupled to a first electrode of the sustain capacitor, and a drain electrode coupled to the first electrode of the storage capacitor.

22. The pixel of claim 14, wherein the sixth transistor comprises a gate electrode coupled to a compensation control line for transmitting a compensation control signal, a first electrode coupled to the drain electrode of the first transistor, and a second electrode coupled to the gate electrode of the first transistor.

23. The pixel of claim 14, wherein the seventh transistor comprises a gate coupled to an emission control line for transmitting an emission control signal, a source electrode coupled to a supply source of the driving power voltage, and a drain electrode coupled to the first electrode of the storage capacitor.

24. The pixel of claim 14, wherein the eight transistor comprises a gate electrode coupled to an emission control line for transmitting an emission control signal, a source electrode coupled to the drain electrode of the first transistor, and a drain electrode coupled to an anode of the organic light emitting diode.

25. The pixel of claim 14, wherein the pixel is configured such that during a first period during which an initialization control signal is transmitted as a gate-on voltage level in one sub-frame, the third and fourth transistor are turned on, and thus, a gate electrode voltage of the first transistor is applied as an initialization voltage and an on-bias voltage is applied to the first transistor.

26. The pixel of claim 14, wherein the pixel is configured such that during a second period during which a compensation control signal is transmitted as a gate-on voltage level in one sub-frame, the fifth transistor is turned on and transmits the data voltage according to a first image data signal, stored in the sustain capacitor, to the storage capacitor and the sixth transistor is turned on to diode-connect the first transistor.

27. The pixel of claim 26, wherein the driving power voltage for driving the pixel is configured to be changed from the high level to a low level during the second period.

28. The pixel of claim 14, wherein the pixel is configured such that during a third period, during which the scan signal is transmitted as a gate-on voltage level in one sub-frame, the second transistor is turned on, and thus, transmits the next sub-frame'"'"'s data voltage corresponding to a second image data signal to the sustain capacitor.

29. The pixel of claim 14, wherein the pixel is configured such that, during a fourth period during which an emission control signal is transmitted as a gate-on voltage level in one sub-frame, the seventh transistor is turned on to transmit a high-level driving power voltage to the first electrode of the storage capacitor and the eight transistor is turned on, and thus, a path of the driving current according to a first image data signal is formed to the organic light emitting diode.

30. The pixel of claim 29, wherein the fourth period is configured to be concurrent with and equal to or longer in duration than a third period during which the scan signal is configured to be transmitted as a gate-on voltage level.

31. The pixel of claim 14, wherein a view point corresponding to the data voltage is different from a view point corresponding to the next sub-frame'"'"'s data voltage.

32. The pixel of claim 14, wherein the data voltage corresponds to a left eye image data signal, and the next sub-frame'"'"'s data voltage corresponds to a right eye image data signal.

33. A method for driving a stereoscopic image display device comprising a plurality of pixels coupled to corresponding scan lines, initialization control lines, compensation control lines, emission control lines, and data lines and for emitting light according to stored data voltages during corresponding sub-frames of a corresponding frame, the method comprising:

initializing the stored data voltages, which correspond to a previous sub-frame of a previous frame, in the pixels to initialization voltages in response to an initialization control signal transmitted through the initialization control lines;

changing the stored data voltages in a storage capacitor of each pixel to correspond to first image data signals, the first image data signals being written in a previous sub-frame for light emission in the corresponding sub-frame, and compensating for a threshold voltage of a driving transistor of each pixel in response to a compensation control signal transmitted through the compensation control lines;

writing second data voltages corresponding to second image data signals, of which a view point is different from that of the first image data signals, to sustain capacitors of the pixels in response to scan signals sequentially applied along a plurality of pixel lines; and

emitting light with a driving current corresponding to the stored data voltage corresponding to the first image data signals from the pixels in response to an emission control signal transmitted through the emission control lines.

34. The method for driving the stereoscopic image display device of claim 33, wherein the light emission is performed separately from the writing of the second data voltage according to the second image data signals to the sustain capacitor in each pixel.

35. The method for driving the stereoscopic image display device of claim 34, wherein the light emission is performed in the same period as the writing of the second data voltage corresponding to the second image data signals, or performed during a period that is concurrent with and longer than the writing of the second data voltage corresponding to the second data signals.

36. The method for driving the stereoscopic image display device of claim 33, wherein the first image data signals are left eye image data signals, and the second image data signals and the third image data signals are right eye image data signals.

37. The method for driving the stereoscopic image display device of claim 33, wherein a driving voltage of a high potential that drives the pixels is transmitted as a low voltage level while the stored data voltage according to the first image data signals are transmitted to the storage capacitors the pixels and the threshold voltages of the driving transistors the pixels are compensated.