PACKAGES AND METHODS FOR PACKAGING

• US 20140117473A1
• Filed: 10/26/2012
• Published: 05/01/2014
• Est. Priority Date: 10/26/2012
• Status: Active Grant

• Current Assignee: Analog Devices, Inc.
• Original Assignee: Analog Devices, Inc.
• Inventors: Kierse, Oliver J., Lillelund, Christian
• Granted Patent: US 9,156,680 B2
• Time in Patent Office: Days
• US Class Current: 257/416
• CPC Class Codes: B81B 2201/0257 Microphones or microspeakers
• CPC Class Codes: B81B 2207/092 Buried interconnects in the substrate or in the lid
• CPC Class Codes: B81B 7/0061 suitable for fluid transfer from the MEMS out of the package or vice versa, e.g. transfer of liquid, gas, sound
• CPC Class Codes: B81B 7/007 Interconnections between the MEMS and external electrical signals
• CPC Class Codes: B81C 2201/0185 Printing, e.g. microcontact printing
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48137 the bodies being arranged next to each other, e.g. on a common substrate
• CPC Class Codes: H01L 2224/48227 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 23/053 the container being a hollow construction and having an insulating or insulated base as a mounting for the semiconductor body
• CPC Class Codes: H01L 29/84 controllable by variation of applied mechanical force, e.g. of pressure
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/13062 Junction field-effect transistor [JFET]
• CPC Class Codes: H01L 2924/1461 MEMS
• CPC Class Codes: H04R 1/02 Casings; Cabinets ; Supports therefor; Mountings therein H04R1/28 takes precedence ; attachments for microphones H04R1/08; mounting of transducers in earpieces H04R1/1075
• CPC Class Codes: H04R 2201/003 Mems transducers or their use

Abstract

A three-dimensional printing technique can be used to form a microphone package. The microphone package can include a housing having a first side and a second side opposite the first side. A first electrical lead can be formed on an outer surface on the first side of the housing. A second electrical lead can be formed on an outer surface on the second side of the housing. The first electrical lead and the second electrical lead may be electrically shorted to one another. Further, vertical and horizontal conductors can be monolithically integrated within the housing.

Claims

1. An integrated device package comprising:

a first housing comprising;

a base and a wall extending from the base, the wall having a distal end portion and a proximal end portion integral with the base; and

a first conductor and a second conductor, the first conductor and the second conductor each extending from the base to the distal end portion of the wall,

wherein at least the base, the wall, the first conductor, and the second conductor are monolithically integrated.

2. The integrated device package of claim 1, wherein at least portions of the first conductor and the second conductor are embedded within the base and the wall of the first housing.

3. The integrated device package of claim 2, wherein the base and wall are formed from a polymer or a ceramic.

4. The integrated device package of claim 2, wherein at least the base, the wall, the first conductor, and the second conductor are sintered together.

5. The integrated device package of claim 1, wherein the first conductor comprises an electrically conductive wire, and wherein the second conductor comprises an electrically conductive shielding layer.

6. The integrated device package of claim 5, further comprising a microelectromechanical systems (MEMS) die mounted on an interior surface of the housing over a port and an integrated device die electrically coupled to the MEMS die.

7. The integrated device package of claim 6, wherein the MEMS die is a microphone die.

8. The integrated device package of claim 1, wherein the first conductor comprises a first wire and the second conductor comprises a second wire, the integrated device package further comprising a second housing comprising a sound port and a third wire, the second housing coupled to the first housing and the third wire coupled to the second wire.

9. The integrated device package of claim 8, further comprising:

a microphone device comprising;

an electret membrane coupled to the distal end portion of the wall and electrically coupled to the first wire;

a spacer ring coupled to the electret membrane; and

a diaphragm coupled to the spacer ring.

10. The integrated device package of claim 9, further comprising an integrated device die mounted to the first housing and electrically coupled to the first wire and the second wire, the integrated device die configured to process analog signals generated by sound waves communicating with the electret membrane and the diaphragm, wherein the first wire is configured to transmit the analog signals to the integrated device die, and wherein the second wire is configured to couple to electrical ground.

11. The integrated device package of claim 10, wherein the third wire extends from an interior surface of the second housing through a wall portion of the second housing, the third wire coupled to the second wire and to the diaphragm.

12. The integrated device package of claim 9, the first housing further comprising a ledge extending proximally into the wall from the distal end portion, the electret membrane positioned on the ledge of the wall, wherein the first wire extends from the base to the ledge of the wall, wherein the distal end portion of the wall comprises a distal edge, and wherein the second wire extends from the base through the wall and past the ledge to the distal edge.

13. An integrated device package comprising:

a housing having a first side and a second side opposite the first side;

a first electrical lead formed on an outer surface on the first side of the housing; and

a second electrical lead formed on an outer surface on the second side of the housing,

wherein the first electrical lead and the second electrical lead are electrically shorted to one another.

14. The integrated device package of claim 13, wherein the housing includes a port formed through the first side of the housing.

15. The integrated device package of claim 14, further comprising an integrated device die mounted to an interior surface of the housing and in electrical communication with an electrical contact pad formed on an interior surface of the housing.

16. The integrated device package of claim 15, wherein the integrated device die is a microphone device die, the integrated device package further comprising a processor die mounted to the housing and in electrical communication with the microphone device die and the electrical contact pad.

17. The integrated device package of claim 14, further comprising a third electrical lead formed on the outer surface on the first side of the housing and a fourth electrical lead formed on the outer surface on the second side of the housing, wherein the third electrical lead and the fourth electrical lead are shorted to one another.

18. The integrated device package of claim 14, the housing comprising:

a base having an outer surface, the first electrical lead formed on the outer surface of the base;

a wall extending from the base, wherein the base and the wall are formed from an electrically insulating material;

an electrical interface formed on a distal end portion of the wall; and

an electrically conductive wire extending from the base to the distal end portion of the wall.

19. The integrated device package of claim 18, the housing further comprising an electrical contact pad formed on an interior surface of the housing and configured for electrical communication with an integrated device die, wherein the conductive wire is configured to electrically couple the contact pad, the first electrical lead, and the second electrical lead.

20. The integrated device package of claim 18, wherein the second electrical lead comprises the electrical interface formed on the distal end portion of the wall, the second electrical lead configured to electrically couple to a mounting board.

21. The integrated device package of claim 18, the housing further comprising a package substrate coupled to the electrical interface formed on the distal end portion of the wall, wherein the second electrical lead is formed on an outer surface of the package substrate.

22. The integrated device package of claim 18, the housing further comprising an electrically conductive shielding layer extending through the base and the wall, wherein the base, the wall, the conductive shielding layer, and the conductive wire are monolithically integrated.

23. The integrated device package of claim 22, wherein the electrically conductive shielding layer comprises a mesh.

24. The integrated device package of claim 22, wherein at least portions of the conductive wire and the conductive shielding layer are embedded within the base and the wall.

25. The integrated device package of claim 22, wherein at least the base, the wall, the conductive shielding layer and the conductive wire are sintered together.

26. The integrated device package of claim 14, wherein the port is a sound port in communication with a microphone device, the sound port comprising:

multiple entrance port holes formed through an outer surface of the first side of the housing;

an acoustic cavity formed within the first side of the housing and in fluid communication with the one or more entrance port holes; and

one or more exit port holes formed through an interior surface of the first side of the housing and in fluid communication with the acoustic cavity.

27. The integrated device package of claim 26, further comprising one or more baffles disposed within the acoustic cavity.

28. The integrated device package of claim 14, wherein an interior surface of the second side of the housing is patterned with one or more acoustic structures configured to modulate the propagation of acoustic waves within the housing.

29. A method for forming an integrated device package, the method comprising forming a first housing by employing a three-dimensional (3D) printing technique to form a non-conductive base having a plurality of integrated horizontal conductors and a non-conductive wall having a plurality of integrated vertical conductors, the wall extending from the base.

30. The method of claim 29, wherein the horizontal conductors are embedded in the non-conductive base and the vertical conductors are embedded in the non-conductive wall.

31. The method of claim 30, wherein the non-conductive base and the non-conductive wall are formed of a polymer or a ceramic.

32. The method of claim 29, wherein employing the 3D printing technique comprises sequentially applying multiple layers to a support structure to form the base and the wall, each layer comprising a pattern defined by selectively applying one or both of a non-conductive material and a conductive material.

33. The method of claim 32, wherein a plurality of the applied layers includes a pattern defined by selectively applying two or more of the non-conductive material, the conductive material, and a sacrificial material.

34. The method of claim 32, wherein applying multiple layers comprises applying a first layer by depositing one or more bits on one of the support structure and a previously applied layer, each bit formed from the non-conductive material, the conductive material, or a sacrificial material.

35. The method of claim 34, further comprising forming a first integrated vertical conductor, wherein forming the first integrated vertical conductor comprises:

applying a first set of one or more bits formed from the conductive material in the first layer; and

applying a second set of one or more bits formed from the conductive material in a second layer such that the second set of one or more bits is substantially vertically aligned with the first set of one or more bits.

36. The method of claim 32, further comprising forming at least one cavity in the first housing by removing sacrificial material that is selectively applied in one or more layers of the first housing.

37. The method of claim 32, further comprising sintering the multiple layers.

38. The method of claim 29, wherein the plurality of vertical conductors formed in the wall of the first housing comprises a first wire and a second wire, the method further comprising forming a second housing by employing the 3D printing technique to form a sound port and a third wire, the second housing configured to be coupled to the first housing and the third wire configured to be coupled to the second wire.

39. The method of claim 38, further comprising:

mounting an electret membrane to a distal end portion of the wall;

electrically coupling the electret membrane to the first wire;

coupling a spacer ring to the electret membrane; and

coupling a diaphragm to the spacer ring.

40. The method of claim 39, further comprising mounting an integrated device die to the first housing and electrically coupling the integrated device die to the first wire and the second wire.

41. A method for packaging an integrated device comprising:

providing a housing having a first side and a second side opposite the first side, wherein a first electrical lead is formed on an outer surface on the first side of the housing and a second electrical lead is formed on an outer surface on the second side of the housing, and wherein the first and second electrical leads are electrically shorted to one another;

mounting an integrated device die to the housing; and

electrically coupling the integrated device die to the housing.

42. The method of claim 41, wherein the housing comprises a base and a wall extending from the base, and wherein mounting the integrated device die to the housing comprises mounting the integrated device die to an interior surface of the housing and coupling a package substrate to a distal end portion of the wall to enclose the integrated device die within the housing.

43. The method of claim 41, wherein the housing comprises a base and a wall extending from the base, and wherein mounting the integrated device die to the housing comprises mounting the integrated device die to a package substrate and coupling the package substrate to a distal end portion of the wall to enclose the integrated device die within the housing.

44. The method of claim 41, wherein providing the housing comprises:

forming a base having an outer surface, the first electrical lead formed on the outer surface of the base;

forming a wall extending from the base, wherein the base and the wall are formed from an electrically insulating material;

forming an electrical interface formed on a distal end portion of the wall; and

forming an electrically conductive wire extending from the base to the distal end portion of the wall.

45. The method of claim 44, wherein providing the housing further comprises forming an electrically conductive shielding layer extending through the base and the wall, the method further comprising monolithically integrating the base, the wall, the conductive shielding layer, and the conductive wire.

46. The method of claim 45, wherein monolithically integrating the base, the wall, the conductive shielding layer, and the conductive wire comprises embedding at least portions of the conductive wire and the conductive shielding layer within the base and the wall.

47. The method of claim 46, further comprising sintering at least the base, the wall, the conductive shielding layer, and the conductive wire.