TRENCH MOSFET HAVING A TOP SIDE DRAIN

• US 20140120672A1
• Filed: 01/07/2014
• Published: 05/01/2014
• Est. Priority Date: 02/13/2012
• Status: Active Grant

• Current Assignee: Force Mos Technology Co., Ltd.
• Original Assignee: Force Mos Technology Co., Ltd.
• Inventors: HSIEH, Fu-Yuan
• Granted Patent: US 8,889,514 B2
• Time in Patent Office: Days
• US Class Current: 438/270
• CPC Class Codes: H01L 29/0623 Buried supplementary region, e.g. buried guard ring multi-RESURF H01L29/0634
• CPC Class Codes: H01L 29/0661 specially adapted for altering the breakdown voltage by removing semiconductor material at, or in the neighbourhood of, a reverse biased junction, e.g. by bevelling, moat etching, depletion etching
• CPC Class Codes: H01L 29/0878 Impurity concentration or distribution
• CPC Class Codes: H01L 29/407 Recessed field plates, e.g. trench field plates, buried field plates
• CPC Class Codes: H01L 29/41766 with at least part of the source or drain electrode having contact below the semiconductor surface, e.g. the source or drain electrode formed at least partially in a groove or with inclusions of conductor inside the semiconductor H01L29/41733 - H01L29/41758 take precedence
• CPC Class Codes: H01L 29/4236 within a trench, e.g. trench gate electrode, groove gate electrode
• CPC Class Codes: H01L 29/66727 with a step of recessing the source electrode
• CPC Class Codes: H01L 29/66734 with a step of recessing the gate electrode, e.g. to form a trench gate electrode
• CPC Class Codes: H01L 29/7809 having both source and drain contacts on the same surface, i.e. Up-Drain VDMOS transistors
• CPC Class Codes: H01L 29/7811 with an edge termination structure guard regions per se H01L29/0619; field plates per se H01L29/402
• CPC Class Codes: H01L 29/7813 with trench gate electrode, e.g. UMOS transistors trench gate electrodes per se H01L29/4236
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

This invention discloses a trench MOSFET comprising a top side drain region in a wide trench in a termination area besides a BV sustaining area, wherein said top side drain comprises a top drain metal connected to an epitaxial layer and a substrate through a plurality of trenched drain contacts, wherein the wide trench is formed simultaneously when a plurality of gate trenches are formed in an active area, and the trenched drain contacts are formed simultaneously when a trenched source-body contact is formed in the active area.

Claims

1. A method for manufacturing a trench MOSFET having a top side drain, comprising:

forming an epitaxial layer of a first conductivity type onto a substrate of the first conductivity type, wherein said epitaxial layer has a lower doping concentration than said substrate;

applying a trench mask and etching a plurality of trenches to a determined depth in said epitaxial layer, wherein said trenches include;

a plurality of gate trenches in an active area, a gate contact trench in a gate contact area and a wide trench in a termination area;

forming a gate oxide layer along inner surfaces of all said trenches and depositing gate material onto said gate oxide layer to fill into said trenches;

carrying out a body dopant ion implantation over entire top surface without a body mask and performing body diffusion step to form body region of a second conductivity type;

depositing a thick oxide layer onto the entire top surface to function as a contact interlayer;

applying a contact mask and etching said contact interlayer to form a plurality of contact holes to expose a part top surface of said epitaxial layer;

carrying out source dopant ion implantation without a source mask over the entire top surface;

performing a source dopant diffusion to laterally diffuse said source dopant from a center portion between two adjacent gate trenches in said active area to adjacent channel regions;

etching said epitaxial layer to further extend said contact holes in said epitaxial layer;

forming a contact metal plug in each of said contact holes;

depositing a front metal and applying a metal mask to pattern said front metal into a source metal, a gate metal and a top drain metal.

2. The method of claim 1, wherein before carrying out said body dopant ion implantation further comprising applying a sinker mask and carrying out sinker dopant ion implantation to form a sinker region heavily doped of the first conductivity type in said epitaxial layer underneath said wide trench.